Description: 合众达的开发板自带测试程序，适合初学者参考。(基于DM642的)-America to the development board to bring their own testing procedures, for beginners reference. (Based on the DM642) Platform: |
Size: 324608 |
Author:赵钱孙 |
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Description: FPGA的测试程序，包括蜂鸣器、显示、流水灯，第一次拿到板子一定要试哦-FPGA testing procedures, including buzzer, display, water lights, for the first time Oh, must try to get the board Platform: |
Size: 700416 |
Author:toutoublue |
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Description: 基于XILINX平台设计的数字频率计，在FPGA内部设计信号源，产生100KHz方波，板上数码管用于显示被测信号频率，并显示6位有效数字，实现对TTL电平的测试，测量精度为10Hz。-: The digital frequency meter based on XILINX development terrace generates 100 KHz square waves by a supply oscillator within FPGA. The nixietubes of the board, which is available of 6 significant figures, are used to display the frequency of the test signal. The meter can realize the function of testing TTL level and gain 10 Hz accuracy. Platform: |
Size: 123904 |
Author:wen |
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Description: 基于VHDL语言实现流水灯功能，并已在FPGA开发板上完成测试-VHDL language based on light water features, and has completed testing in FPGA development board Platform: |
Size: 1024 |
Author:liuhang |
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Description: 这是用verilog写的配合DE2 FPGA开发板的10进制显示频率计的工程文件夹的压缩包，解压后可直接下载到DE2板上，其中频率输入端是系统自带27M时钟D13用于测试，如果想要应用于别的开发板，可以重新分配引脚。-DE2 FPGA development board with with verilog write with decimal display frequency meter project folder compression package, after decompression can be directly downloaded to the DE2 board, in which the frequency of the input of the system comes with 27M clock D13 used for testing If you want to apply to other development board can reassign pin. Platform: |
Size: 615424 |
Author:予烨 |
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Description: 用VHDL语言实现的打砖块游戏
游戏特点有：
不同难度级别、
计分功能、
生命值、
绚丽结束画面、
砖块形转方便修改、
随机发射速度、
挡板不同位置反射角不同、
小球速度、挡板宽度可变
通过FPGA实验板和VGA测试。-With VHDL Game features include: different difficulty levels, scoring function, the value of life, brilliant ending screen, brick-shaped turn facilitate changes randomly launch speed, the angle of reflection baffle different locations different from ball speed, baffle width change through the FPGA experimental board and VGA testing. Platform: |
Size: 850944 |
Author:muname |
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Description: This document describes functionality testing of the Altera Cyclone III FPGA Starter Kit Development Board. It also includes testing of associated daughterboards, i.e. the ADA ADC/DAC board and the HSMC to GPIO adapter board. Platform: |
Size: 1209344 |
Author:mchi2ph2 |
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Description: VHDL实现红绿灯，multisim测试通过，可直接烧录到FPGA板上进行测试,带testbench-VHDL realize traffic lights, multisim tested, can be burned directly to the FPGA board for testing, with testbench Platform: |
Size: 3072 |
Author:邢晓天 |
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Description: 此秒表有两个按键（reset， start）按下reset键后，秒表清零，按下start键后，开始计时， 再次按下start键后， 停止计时， 用FPGA开发板上的两个七段数码管显示时间（以秒为单位），计时由0 到 59 循环。
高级要求（可选）：实现基本要求的前提下，增加一个按键（select），用于轮流切换两个七段数码管分别显示百分之一秒，秒，分钟。
规格说明：
1.通过按下reset键（异步复位），将秒表清零，准备计时，等检测到start键按下并松开后，开始计时 。如果再次检测到start键按下并松开后，停止计时。通过不断检测start键，来确定秒表是否开始计时
2.在秒表计时时，七段数码管能够循环的由00…59,00…59…。
3.开始默认两个七段数码管显示秒， 在检测到select键按下并松开后，数码管切换到显示分钟，再次检测到select键按下并松开后，数码管切换到显示百分之一秒，当再次检测到select键按下并松开后，数码管切换到重新显示秒。
4.在秒表停止时，数码管依然能够正常切换显示百分之一秒，秒，分钟。-This stopwatch has two buttons (reset, start) press the reset button after the stopwatch is cleared, press the start button to start the timer, press the start button again to stop the clock, seven with two FPGA development board digital display time (in seconds), time the 0-59 cycle. Advanced requirements (optional): to achieve the basic requirements under the premise of adding a button (select), for alternately switching between two seven-segment LED display are hundredths of a second, seconds, minutes. Specifications: 1. Press the reset button (asynchronous reset), the stopwatch is cleared in preparation for timing, and other testing to start Press and release the start timing. If the detected start button press and release again to stop the clock. By constantly testing the start key to determine whether to start the stopwatch timer 2. When the stopwatch, the seven segments can be recycled by ... 59 ... 00 ... 59.00. 3. Start the default two seven-segment LED display seconds after Platform: |
Size: 2789376 |
Author:XiaoLiuMang |
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Description: 第一个FPGA程序的开发测试,用于DE1开发板的调试程序-The first FPGA development and testing program for debugging DE1 development board Platform: |
Size: 6032384 |
Author:冯华 |
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