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[Other resource] FTCTRL

Description: 四位十进制频率计的顶层控制模块，用于生成测频需要的复位及控制信号-four decimal frequency of top-level control modules, used to generate the required frequency measurement and control signals reset
Platform: | Size: 912 | Author: 萧飒 | Hits:

[Other resource] work5FREQTEST

Description: 8位十六进制频率计设计 根据频率的定义和频率测量的基本原理，测定信号的频率必须有一个脉宽为1s的输入信号脉冲计数允许信号；1s计数结束后，计数值被锁入锁存器，计数器清零，为下一测频计数周期做好准备。测频控制信号可由一个独立的发生器（FTCTRL）来产生。
Platform: | Size: 244660 | Author: lkiwood | Hits:

[VHDL-FPGA-Verilog] FTCTRL

Description: 四位十进制频率计的顶层控制模块，用于生成测频需要的复位及控制信号-four decimal frequency of top-level control modules, used to generate the required frequency measurement and control signals reset
Platform: | Size: 1024 | Author: 萧飒 | Hits:

[VHDL-FPGA-Verilog] work5FREQTEST

Description: 8位十六进制频率计设计 根据频率的定义和频率测量的基本原理，测定信号的频率必须有一个脉宽为1s的输入信号脉冲计数允许信号；1s计数结束后，计数值被锁入锁存器，计数器清零，为下一测频计数周期做好准备。测频控制信号可由一个独立的发生器（FTCTRL）来产生。-8-bit hexadecimal Cymometer designed in accordance with the definition of frequency and frequency of the basic principles of measurement to determine the frequency of the signal must have a pulse width of the input signal for 1s permit pulse counting signal 1s counting after the total value was locked into the lock depositors, counters cleared for the next count cycle frequency measurement ready. Frequency control signal generator may be an independent (FTCTRL) to generate.
Platform: | Size: 244736 | Author: lkiwood | Hits:

[VHDL-FPGA-Verilog] FTCTRL

Description: 这个是数字频率计，是eda课程当中的一个实验题目-This is the digital frequency meter, which is an experimental eda subject of course
Platform: | Size: 844800 | Author: phantom | Hits:

[VHDL-FPGA-Verilog] ftctrl

Description: 基于FPGA实现的32位计数器，可控制计数位宽。-FPGA-based implementation of the 32-bit counter, can control the counting bits wide.
Platform: | Size: 801792 | Author: 林积分 | Hits:

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