Description: 这是一本讲解FPGA的书,书中详尽的介绍了FPGA的入门及用法,从简单到复杂.-This is an FPGA on the book detail the FPGA entry and usage, from simple to complex. Platform: |
Size: 6936576 |
Author:fangqiandao |
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Description: The LatticeMico8™ is an 8-bit microcontroller optimized for Field Programmable Gate Arrays (FPGAs) and Crossover Programmable Logic Device architectures from Lattice.
Combining a full 18-bit wide instruction set with 16 or 32 General Purpose registers, the LatticeMico8 is a flexible Verilog and VHDL reference design suitable for a wide variety of markets, including communications, consumer, computer, medical, industrial, and automotive.
The core consumes minimal device resources, less than 200 Look Up Tables (LUTs) in the smallest configuration, while maintaining a broad feature set.-The LatticeMico8™ is an 8-bit microcontroller optimized for Field Programmable Gate Arrays (FPGAs) and Crossover Programmable Logic Device architectures from Lattice.
Combining a full 18-bit wide instruction set with 16 or 32 General Purpose registers, the LatticeMico8 is a flexible Verilog and VHDL reference design suitable for a wide variety of markets, including communications, consumer, computer, medical, industrial, and automotive.
The core consumes minimal device resources, less than 200 Look Up Tables (LUTs) in the smallest configuration, while maintaining a broad feature set. Platform: |
Size: 1155072 |
Author:郭豪偉 |
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Description: FPGA是英文Field Programmable Gate Array的缩写，即现场可编程门阵列，它是在PAL、GAL、EPLD等可编程器件的基础上进一步发展的产物。-FPGA is the English acronym for Field Programmable Gate Array, or field programmable gate arrays, it is in PAL, GAL, EPLD and other programmable devices based on the further development of the product. Platform: |
Size: 4754432 |
Author:刘超 |
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Description: DAB接收机，包括信道解码的资料。DAB系统中载波频偏估计等。
-The Digital Audio Broadcasting (DAB)
system promises to provide CD-quality sounds and
flexible data services to mobile, portable and fixed
receivers. In order to achieve high quality in
multipath environment, a complicated channel coding
and modulation scheme is adopted. This paper
presents a channel decoding architecture for DAB test
receiver, which accomplishes the functions including
program selection, de-multiplexing, time deinterleaving,
null symbol insertion into punctured bitstream
and Viterbi decoding. The channel decoder
was successfully realized on field programmable gate
arrays and Viterbi decoding chips. Platform: |
Size: 1051648 |
Author:杨艳 |
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Description: This book is designed to be a desktop reference for engineers, students and researchers who use Field Programmable Gate Arrays(FPGA) as their hardware platform of choice. Platform: |
Size: 1371136 |
Author:Nima |
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Description: vhdl VHDL (VHSIC hardware description language) is a hardware description language used in electronic design automation to describe digital and mixed-signal systems such as field-programmable gate arrays and integrated circuits. Platform: |
Size: 232448 |
Author:dhaouadi |
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Description: Digital filtering algorithms are most commonly implemented
using general purpose digital signal processing chips for audio
applications, or special purpose digital filtering chips and application-
specific integrated circuits (ASICs) for higher rates. This
paper describes an approach to the implementation of digital filter
algorithms based on field programmable gate arrays (FPGAs). Platform: |
Size: 318464 |
Author:JAVAD |
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Description: Field programmable gate arrays (FPGAs) are emerging in many areas of high performance computing, either as tailor made signal processor, embedded algorithm implementation, systolic array, software accelerator or application specific architecture. FPGAs are so flexible and reconfigurable that they are capable of massively parallel operations, explicitly tailored to the problem at hand. There are lot of paradigms to put FPGAs at work in a high performance computing environment There are number of limitations which restrict FPGAs to reach the performance of Application Specific Integrated Circuits (ASICs) but they provide the possibility of changing the hardware design easily while outpacing software implementations on general purpose processors. Platform: |
Size: 2638848 |
Author:javad |
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Description: Field programmable gate arrays (FPGAs) are emerging in many areas of high performance computing, either as tailor made signal processor, embedded algorithm implementation, systolic array, software accelerator or application specific architecture. FPGAs are so flexible and reconfigurable that they are capable of massively parallel operations, explicitly tailored to the problem at hand. There are lot of paradigms to put FPGAs at work in a high performance computing environment There are number of limitations which restrict FPGAs to reach the performance of Application Specific Integrated Circuits (ASICs) but they provide the possibility of changing the hardware design easily while outpacing software implementations on general purpose processors. Platform: |
Size: 248832 |
Author:javad |
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Description: Field programmable gate arrays (FPGAs) are emerging in many areas of high performance computing, either as tailor made signal processor, embedded algorithm implementation, systolic array, software accelerator or application specific architecture. FPGAs are so flexible and reconfigurable that they are capable of massively parallel operations, explicitly tailored to the problem at hand. There are lot of paradigms to put FPGAs at work in a high performance computing environment There are number of limitations which restrict FPGAs to reach the performance of Application Specific Integrated Circuits (ASICs) but they provide the possibility of changing the hardware design easily while outpacing software implementations on general purpose processors. Platform: |
Size: 19456 |
Author:javad |
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Description: 本书的名字是《数字信号处理的FPGA实现》介绍了当前FPGA技术、元器件和用于设计最新DSP系统的工具-This book s name is Digital Signal Processing with Field Programmable Gate Arrays (Signals and Communication Technology) Platform: |
Size: 8928256 |
Author:王力 |
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Description: This paper provides a tutorial survey of architectures of commercially available high-capacity
field-programmable devices (FPDs). We first define the relevant terminology in the field and then
describe the recent evolution of FPDs. The three main categories of FPDs are delineated: Simple
PLDs (SPLDs), Complex PLDs (CPLDs) and Field-Programmable Gate Arrays (FPGAs). We
then give details of the architectures of all of the most important commercially available chips,
and give examples of applications of each type of device. Platform: |
Size: 202752 |
Author:vipjvs |
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Description: 电子密码锁
基于FPGA设计的电子密码锁是一个小型的数字系统，与普通机械锁相比，具有许多独特的优点：保密性好，防盗性强，可以不用钥匙，记住密码即可开锁等。目前使用的电子密码锁大部分是基于单片机技术，以单片机为主要器件。在实际应用中，程序容易跑飞，系统的可靠性较差。本文介绍的一种基于现场可编辑门阵列FPGA器件的电子密码锁的设计方法，采用VHDL语言对系统进行描述，并在EP3C10E144C8上实现。-password lock
FPGA-based design of the electronic code lock is a small digital system. It has many unique advantages：good privacy and security , it do not need the key but remember password to unlock, and so on while it compare to ordinary mechanical locks. At present, the electronic code lock is most used of SCM technology .In practice, however, the process easy run to fly. So the reliability of this system is poor. The paper introduced a field programmable gate arrays FPGA devices to design electronic password lock. The VHDL language is used to describe the system and achieved in EP3C10E144C8. Platform: |
Size: 437248 |
Author:zhu |
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Description: 基于FPGA设计的电子密码锁是一个小型的数字系统，与普通机械锁相比，具有许多独特的优点：保密性好，防盗性强，可以不用钥匙，记住密码即可开锁等。目前使用的电子密码锁大部分是基于单片机技术，以单片机为主要器件。在实际应用中，程序容易跑飞，系统的可靠性较差。本文介绍的一种基于现场可编辑门阵列FPGA器件的电子密码锁的设计方法，采用VHDL语言对系统进行描述，并在EP3C10E144C8上实现。
通过仿真调试，利用可编程逻辑器件FPGA的电子密码锁的设计基本达到了预期目的。当然，该系统在一些细节的设计上还需要不断地完善和改进，特别是对系统的扩展有很好的使用系统和设计的价值。-The Report Of Electronic Code Lock Design
Abstract：FPGA-based design of the electronic code lock is a small digital system. It has many unique advantages：good privacy and security , it do not need the key but remember password to unlock, and so on while it compare to ordinary mechanical locks. At present, the electronic code lock is most used of SCM technology .In practice, however, the process easy run to fly. So the reliability of this system is poor. The paper introduced a field programmable gate arrays FPGA devices to design electronic password lock. The VHDL language is used to describe the system and achieved in EP3C10E144C8.
Though the simulation tests, using FPGA-based design of the electronic code lock can achieve the expected goal. Of course, some of the details of the system in the design of the need to constantly refined and improved, in particular the expansion of the system have a good design and practical value.
Keyword: FPGA VHDL language electronic passw Platform: |
Size: 150528 |
Author:zhu |
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Description: Orthogonal Frequency Division Multiplexing
(OFDM) has been adopted by most wireless and wired communication standards these include wireless Local Area Networks (LANs) HyperLan2, 802.11a, broadband wireless(802.16) and lately the 802.15.3c for millimetre wave communications. In parallel, Field-Programmable Gate Arrays (FPGAs) have become an alternative for the implementation of those standards, due to their increased capabilities (speed and resources). This work introduces the design and performance evaluation of an OFDM transceiver, implemented on a FPGA platform for applications on a wireless millimetre wave radio system, operating around 60GHz.-Orthogonal Frequency Division Multiplexing
(OFDM) has been adopted by most wireless and wired communication standards these include wireless Local Area Networks (LANs) HyperLan2, 802.11a, broadband wireless(802.16) and lately the 802.15.3c for millimetre wave communications. In parallel, Field-Programmable Gate Arrays (FPGAs) have become an alternative for the implementation of those standards, due to their increased capabilities (speed and resources). This work introduces the design and performance evaluation of an OFDM transceiver, implemented on a FPGA platform for applications on a wireless millimetre wave radio system, operating around 60GHz. Platform: |
Size: 535552 |
Author:boualem |
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Description: iar IAR Systems即将发布支持ARM EABI开放标准的IAR Embedded Workbench(r) Version 5 for ARM(r)，这是对公司的旗舰产品—编译器和调试器的重大升级，使之成为第一个独立支持最新的ARM Cortex(tm)-M1处理器的开发。 Cortex(tm)-M1是第一个特别为field-programmable gate arrays(s)而设计的ARM处理器。 -iar IAR Systems will soon release supports ARM EABI open standard IAR Embedded Workbench (r) Version 5 for ARM (r), which is a major upgrade to the company' s flagship product- the compiler and debugger, making it the first independent support latest ARM Cortex (tm)-M1 processor development. Cortex (tm)-M1 is the first ARM processor especially designed for field-programmable gate arrays (s). Platform: |
Size: 968704 |
Author:王大枣 |
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Description: This book is an undergraduate level textbook presenting a thorough discussion of state− of− the−
art digital devices and circuits. It supplements our Electronic Devices and Amplifier Circuits, ISBN
0− 9709511− 7− 5. It is self− contained begins with the basics and ends with the latest
developments of the digital technology. The intent is to prepare the reader for advanced digital
circuit design and programming the powerful Complex Programmable Logic Devices (CPLDs),
and Field Programmable Gate Arrays (FPGAs).-This book is an undergraduate level textbook presenting a thorough discussion of state− of− the−
art digital devices and circuits. It supplements our Electronic Devices and Amplifier Circuits, ISBN
0− 9709511− 7− 5. It is self− contained begins with the basics and ends with the latest
developments of the digital technology. The intent is to prepare the reader for advanced digital
circuit design and programming the powerful Complex Programmable Logic Devices (CPLDs),
and Field Programmable Gate Arrays (FPGAs). Platform: |
Size: 10825728 |
Author:anand |
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Description: This paper proposes a fully digitized hardware design
scheme of a vector-controlled servo controller, which is verified
and implemented on one-chip field programmable gate arrays
(FPGA), for high-performance servo drives of the permanent
magnet synchronous motor (PMSM). Platform: |
Size: 412672 |
Author:xray |
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