Description: 本文：采用了FPGA方法来模拟高动态(Global Position System GPS)信号源中的C／A码产生器。C／A码在GPS中实现分址、卫星信号粗捕和精码(P码)引导捕获起着重要的作用，通过硬件描述语言VERILOG在ISE中实现电路生成，采用MODELSIM、SYNPLIFY工具分别进行仿真和综合。-This article: FPGA method used to simulate the high dynamic (Global Position System GPS) signal source of the C/A code generator. C/A code in GPS to achieve sub-sites, the satellite signal capture coarse and fine code (P code) lead capture plays an important role, through hardware description language Verilog in ISE to achieve circuit to generate, using MODELSIM, SYNPLIFY simulation tools were and integrated. Platform: |
Size: 163840 |
Author:xiaozhu |
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Description: 本文设计的FPGA模块需要对GPS、便携打印机和串口数据进行处理，将详细介绍如何设计FPGA和不同外设之间的数据传输。同时，在RTL编码中，编写使综合与布局布线效果更佳的代码。-In this paper, the design of FPGA modules need for GPS, portable printers, and serial data processing, will be details on how to design FPGA and data transfer between peripherals. At the same time, RTL coding, synthesis and preparation to make better placement and routing code. Platform: |
Size: 11264 |
Author:zhanyi |
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Description: 基于verilog语言的ＧＰＳ模拟源代码，代码为４颗星，包含噪声信号。-GPS-based Analog Verilog language source code, code for the four stars, including the noise signal. Platform: |
Size: 6144 |
Author:Li Gengmin |
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Description: 在ModelSim或其他支持Verilog语言编译的环境中仿真可得GPS的P码及与卫星数据码调制后的波形，其中一个为源程序，另一个为测试程序-ModelSim or other support in the language Verilog simulation environment to compile available GPS P-code and code of satellite data after the modulation waveform, one for the source, and the other for the test procedure Platform: |
Size: 69632 |
Author:tianjieyu |
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Description: 基于vhdl/verilog的gps接收机伪随机码产生程序。已经过仿真综合。-Based on vhdl/verilog of the gps receiver pseudo-random code generation process. Simulation has been integrated. Platform: |
Size: 1024 |
Author:包鼎华 |
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Description: 此Verilog程序产生用于GPS卫星导航信号的C/A码，输入信号有时钟、时钟使能、复位、给定的卫星编号，输出产生的C/A码。此程序在代码上进行优化，占用了更少的资源。-This procedure generated Verilog for the GPS satellite navigation signals C/A code, the input signal with the clock, clock enable, reset, given the satellite number, the output generated C/A code. This procedure carried out in the code optimization, take up fewer resources. Platform: |
Size: 1024 |
Author:李殿为 |
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Description: 此Verilog程序产生用于GPS卫星导航信号的C/A码，输入信号有时钟、时钟使能、复位、给定的卫星编号，输出产生的C/A码。此程序在代码上进行优化，占用了更少的资源。--This program generates Verilog GPS satellite navigation signals for C/A code, the input signal with a clock, clock enable, reset, given the satellite number, the output generated C/A code. This program on code optimization, taking up less resources Platform: |
Size: 2048 |
Author:pyy |
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