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[Crack Hack] sha1_verilog

Description: 安全散列算法的另一种verilog实现，对面积的要求更小，但损失了速度，但在一般系统中，完全可以满足大部分需要了-Secure Hash Algorithm another Verilog realization of the demands of a smaller area, but a loss of speed, but in the general system, fully satisfy the needs of the most
Platform: | Size: 20480 | Author: 金鑫 | Hits:

[RFID] hash

Description: 适用于RFID安全认证协议的轻量级hash算法，输出64bit数据。-Applicable to lightweight RFID authentication protocol security hash algorithm, output 64bit data.
Platform: | Size: 2048 | Author: Peter | Hits:

[VHDL-FPGA-Verilog] md5

Description: hash algorithm-- md5
Platform: | Size: 3072 | Author: arsha | Hits:

[VHDL-FPGA-Verilog] FPGA-Implementation-Of-MD5-Hash-Algorithm

Description: MD5 Hash Algoritm implementation on a FPGA. Performance evaluation.
Platform: | Size: 119808 | Author: Birrax | Hits:

[VHDL-FPGA-Verilog] HASH-code-implementation-using-VHDL

Description: implementation for Secure Hash Algorithm 1 SHA-1 in vhdl language contain no test file.
Platform: | Size: 14336 | Author: waleed | Hits:

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