Search - Hamming code vhdl

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[SCM] VHDL范例 DL : 0: 最高优先级编码器 8位相等比较器三人表决器（三种不同的描述方式）加法器描述 8位总线收发器：74245 （注2）地址译码（for m68008）多路选择器（使用select语句） LED七段译码多路选择器（使用if－else语句）双2－4译码器：74139 多路选择器（使用when－else语句）二进制到BCD码转换多路选择器（使用case语句）二进制到格雷码转换双向总线（注2）汉明纠错吗译码器三态总线（注2）汉明纠错吗编码器解复用器 -highest priority encoder, compared to eight for phase three of the vote (the description of three different ways) Adder Description eight bus Transceivers : 74,245 (Note 2) address decoder (for m68008) Multiple choice (use select statement) LED paragraph 107 of decoding multiple choice ( use if-else statements) 2-4 dual decoder : over 74,139 road choice (use when-else statements) of the binary conversion BCD multiple choice (use case statement) binary Gray code conversion to a two-way bus (Note 2)? Hamming error correction decoder three-state Bus (Note 2)? Hamming error correction encoder demultiplexer
Update : 2025-02-17 Size : 42kb Publisher : kerty
[VHDL-FPGA-Verilog] 一些译码器源代码 DL : 0: 内有LED译码器，汉明纠错译码器，地址译码器，最高优先译码器，双2－4译码器等VHDL的源代码-decoder, Hamming error correction decoder, address decoder, the highest priority decoder, dual 2-4 decoder such as VHDL source code
Update : 2025-02-17 Size : 4kb Publisher : 蔡孟颖
[Embeded-SCM Develop] hammingencoding DL : 0: 1.汉明编码的硬件实现vhdl语言 2.测试用，简单明晰 3.内含有另一份c代码的汉明码纠错编码源代码-1. Hamming codes hardware vhdl two languages. Test, 3 simple clarity. Another containing a code c Hamming code error correction coding source code
Update : 2025-02-17 Size : 2kb Publisher : 方周
[VHDL-FPGA-Verilog] hanmin DL : 0: 4位汉明编译码源代码。VHDL格式，经过仿真和测试通过，请放心使用。-four Hamming encryption source code. VHDL format, through simulation and test pass, please rest assured that use.
Update : 2025-02-17 Size : 135kb Publisher : 田军卓
[VHDL-FPGA-Verilog] HammingEncoder DL : 0: VHDL编写的汉明纠错码译码器,数字传输中汉明纠错码的译码所用-VHDL prepared Hamming error-correcting code decoder, digital transmission Hamming error-correcting codes used in the decoding
Update : 2025-02-17 Size : 1kb Publisher : wei
[VHDL-FPGA-Verilog] VHDL DL : 1: VHDL程序集锦，很多有用程序，英文版其中有汉明码编译码，优先译码等等。-VHDL Collection procedures, many useful procedures, the English version of them hamming code encoding and decoding, the priority decoder and so on.
Update : 2025-02-17 Size : 165kb Publisher : 萍果
[VHDL-FPGA-Verilog] hanmingjiaozhi DL : 1: 通过VHDL实现汉明码，交织码的编码与解码，开发环境Quartus-Through VHDL realize hamming code, interleaving the encoding and decoding code, development environment, Quartus
Update : 2025-02-17 Size : 3kb Publisher : mayue
[Other] 7 DL : 0: (7，4)汉明码的编码程序，实现4位信息位后加三位监督位，组成7位码组-(7,4) hamming code encoding process, realize information-bit 4 after three supervision, and composed of seven yards Group
Update : 2025-02-17 Size : 1kb Publisher : Hargie
[VHDL-FPGA-Verilog] 74HammingCode DL : 0: 用VHDL语言编写的可以实现（7，4）汉明码编解码的程序。-Using VHDL language can be achieved (7,4) Hamming Code Codec procedures.
Update : 2025-02-17 Size : 662kb Publisher : 王磊
[VHDL-FPGA-Verilog] hammingDec DL : 0: hamming/汉明码的解码代码，在通信中常常用到汉明码-hamming/hamming code decoder code, usually used in communication Hamming Code
Update : 2025-02-17 Size : 1kb Publisher : leng
[Windows Develop] hamming DL : 0: Hamming code generator for 4 bit
Update : 2025-02-17 Size : 3kb Publisher : Digitalkurt
[source in ebook] HammingDecoder DL : 0: -- Hamming Decoder -- This Hamming decoder accepts an 8-bit Hamming code (produced by the encoder above) and performs single error correction and double error detection. -- download from: www.pld.com.cn & www.fpga.com.cn LIBRARY ieee USE ieee.std_logic_1164.ALL ENTITY hamdec IS PORT(hamin : IN BIT_VECTOR(0 TO 7) --d0 d1 d2 d3 p0 p1 p2 p4 dataout : OUT BIT_VECTOR(0 TO 3) --d0 d1 d2 d3 sec, ded, ne : OUT BIT) --diagnostic outputs END hamdec ARCHITECTURE ver1 OF hamdec IS BEGIN --- Hamming Decoder -- This Hamming decoder accepts an 8-bit Hamming code (produced by the encoder above) and performs single error correction and double error detection. -- download from: www.pld.com.cn & www.fpga.com.cn LIBRARY ieee USE ieee.std_logic_1164.ALL ENTITY hamdec IS PORT(hamin : IN BIT_VECTOR(0 TO 7) --d0 d1 d2 d3 p0 p1 p2 p4 dataout : OUT BIT_VECTOR(0 TO 3) --d0 d1 d2 d3 sec, ded, ne : OUT BIT) --diagnostic outputs END hamdec ARCHITECTURE ver1 OF hamdec IS BEGIN
Update : 2025-02-17 Size : 4kb Publisher : djs
[3G develop] HANMINGMA DL : 0: 7,4汉明码的编译码原理，用VHDL语言实现的，需要的请下载-Hamming code encoding and decoding of 7,4 principle, using VHDL language and the clear need to download
Update : 2025-02-17 Size : 1kb Publisher : mayuan
[VHDL-FPGA-Verilog] ddr2_hamdec64 DL : 0: VHDL实现的64bit海明码解码模块。可适用于 Xilinx FPGA, Altera FPGA。-VHDL Implement 64bit Hamming Code （decode）
Update : 2025-02-17 Size : 2kb Publisher : seiya
[VHDL-FPGA-Verilog] ddr2_hamenc64 DL : 0: VHDL实现的64bit海明码编码模块。可适用于 Xilinx FPGA, Altera FPGA。-VHDL Implement 64 bit Hamming Code (encode)
Update : 2025-02-17 Size : 1kb Publisher : seiya
[Home Personal application] HDECODER DL : 0: code for hamming code
Update : 2025-02-17 Size : 7kb Publisher : farid
[matlab] encode DL : 0: （7 4）汉明编码源程序，简单实用，可供大家下载，如有问题，望大家多多包含！-(74) Hamming code source, simple and practical, available for everyone to download and, if problems, hope you lot included!
Update : 2025-02-17 Size : 1kb Publisher : lijun
[OS program] VHDL_hammingcode DL : 0: 自己做的信道编译码，（4，7）汉明码的加错解错源代码-Do their own channel coding, (4,7) Hamming code plus misconception wrong source
Update : 2025-02-17 Size : 3kb Publisher : 杨敦坤
[VHDL-FPGA-Verilog] hamming DL : 0: 汉明码编码与译码全过程，经过验证，简单实用-Hamming code encoding and decoding the entire process, proven, simple and practical
Update : 2025-02-17 Size : 1kb Publisher : 赵茂华
[VHDL-FPGA-Verilog] 74-Hamming-code-encoder-and-decoder DL : 0: 基于VHDL实现（7，4）汉明码的编码器和译码器-VHDL-based implementation (7,4) Hamming code encoder and decoder
Update : 2025-02-17 Size : 3kb Publisher : 付沅键

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