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Description: altera的ip核, 添加后,在quartusII中可以轻松实现对i2c的控制,是fpga开发人员的必备工具之一。
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Size: 12461 |
Author: 朱峰 |
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Description: I2C controller verilog code for altera fpga platform.
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Size: 1749 |
Author: 蔡俊仪 |
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Description: altera i2c host/device-ALTERA i2c host/device
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Size: 1541120 |
Author: 馬旧 |
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Description: altera的ip核, 添加后,在quartusII中可以轻松实现对i2c的控制,是fpga开发人员的必备工具之一。-altera
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Size: 12288 |
Author: 朱峰 |
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Description: I2C controller verilog code for altera fpga platform.
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Size: 1024 |
Author: 蔡俊仪 |
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Description: i2c ipcore of altera fpga that uses ahdl lauguage.
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Size: 7168 |
Author: linjack |
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Description: i2c module. i test it on Altera FPGA.
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Size: 3072 |
Author: almondeo |
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Description: I2C主机端模块 具有avalon-MT总线接口 可挂载在Altera soc系统之上 使NiosII处理器具备I2C通信能力 模块由Verilog HDL编写 并经Cyclone II FPGA测试-I2C master modul which has a avalon-MT interface that can be attached to Altera SOC system. It provides NiosII I2C communication capability . This module is written with Verilog HDL and has been tested on a Cyclone II FPGA
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Size: 6144 |
Author: magic_andy |
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Description: 分析了各种视频采集方案的研究现状。对如何采用CCD 摄像头采集高分辨率、高质量的图像以及基于FPGA 的嵌
入式视频图像采集系统的实现方法进行了研究。采用了以摄像头+ 解码芯片模式为采集方案, 针对视频解码芯片
ADV7181B,实现了I2C 总线配置、ITU656 解码、VGA 显示模块的设计。设计的视频采集控制器已经在Altera 公司的CycloneII
系列FPGA(EP2C35)上实现。结果显示本设计具有速度高、成本低、易于集成等优点-Analysis of a variety of video capture programs reviewed. On how to use CCD camera capture high-resolution, high-quality images, as well as FPGA-based embedded video image acquisition system realization method was studied. Used to camera mode+ decoder chip collection program for video decoder chip ADV7181B, realized the I2C bus configuration, ITU656 decoder, VGA display module design. The video capture controller has been designed in the Altera' s CycloneII series FPGA (EP2C35) to achieve. The results showed that this design has a high speed, low cost, easy to integrate the advantages of
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Size: 179200 |
Author: 李明 |
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Description: 与IP核配套的I2C-Master Core,包含了目前主流FPGA芯片的I2C实现,代码包括Altera/Xilinx/OpenCore等公司的VHDL/Verilog/C等。-I2C-Master Core
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Size: 3256320 |
Author: summerooooo |
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Description: I2C/IIC 总线接口驱动,在Altera和Xilinx的FPGA上跑过,Verilog编写,Craftor原创。V1.1。代码中还包含了24C02的读写测试程序,可直接用。-I2C/IIC Bus Driver, written in Verilog, v1.1. By Craftor
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Size: 2048 |
Author: Craftor |
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Description: 本源代码中用Verilog HDL语言编写了I2C的顶层及子模块文件,详细完整,并在Altera实验板上得以验证-primitive code discribe the I2C s function using the Verilog HDL language,
the code are particular and integrity,moreover it has been validated in the altera FPGA and passed
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Size: 18432 |
Author: 蔡德胜 |
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Description: 分析了各种视频采集方案的研究现状。对如何采用CCD 摄像头采集高分辨率、高质量的图像以及基于FPGA 的嵌 入式视频图像采集系统的实现方法进行了研究。采用了以摄像头+ 解码芯片模式为采集方案, 针对视频解码芯片 ADV7181B,实现了I2C 总线配置、ITU656 解码、VGA 显示模块的设计。设计的视频采集控制器已经在Altera 公司的CycloneII 系列FPGA(EP2C35)上实现。结果显示本设计具有速度高、成本低、易于集成等优点-Analysis of a variety of video capture programs reviewed. On how to use CCD camera capture high-resolution, high-quality images, as well as FPGA-based embedded video image acquisition system realization method was studied. Used to camera mode+ decoder chip collection program for video decoder chip ADV7181B, realized the I2C bus configuration, ITU656 decoder, VGA display module design. The video capture controller has been designed in the Altera s CycloneII series FPGA (EP2C35) to achieve. The results showed that this design has a high speed, low cost, easy to integrate the advantages of
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Size: 4064256 |
Author: looksky |
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Description: 基于ALTERA EP2C8Q208 FPGA的通过i2c通信读写24c01的VHDL程序-A VHDL program,based on EP2C8Q208,using i2c read and write data to 24c01
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Size: 254976 |
Author: 曹锋 |
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Description: 实现音频和视频器件的配置。器件使用的使Altera FPGA,配置方式使用乐I2C接口。-The configuration of audio and video devices. The device used in Altera FPGAs, configured to use the music I2C interface.
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Size: 1207296 |
Author: qiumh |
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Description: 分析了各种视频采集方案的研究现状。对如何采用CCD 摄像头采集高分辨率、高质量的图像以及基于FPGA 的嵌入式视频图像采集系统的实现方法进行了研究。采用了以摄像头+ 解码芯片模式为采集方案, 针对视频频解码芯片ADV7181B,实现了I2C 总线配置、ITU656 解码、VGA 显示模块的设计。设计的视频采集控制器已经在Altera 公司的CycloneII系列FPGA(EP2C35)上实现。结果显
-Status of a variety of video capture programs. How to use the CCD camera to capture high-resolution, high-quality images, as well as FPGA-based embedded video image acquisition system has been studied. Decoder chip to the camera+ acquisition program, the configuration of the I2C bus for the video frequency decoding chip ADV7181B ITU656 decoding VGA display module design. The design of the video capture controller Altera Corporation CycloneII series FPGA (EP2C35). Results significantly
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Size: 180224 |
Author: noahkk |
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Description: FPGA的I2C源码,基于Altera QUartusII的开发环境。-I2C-source FPGA-based Altera QUartusII development environment.
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Size: 878592 |
Author: luoyuanhong |
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Description: Modified I2C salve design
1. Asynchronous design: ASIC or FPGA design option
2. 8 bits CSR RW interface: 0~15, address and control
3. PAD not included
4. Altera CPLD verified
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Size: 2048 |
Author: ph5077
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Description: 编写FPGA 的模拟I2C通信,用的是altera验证(The preparation of FPGA analog I2C communication, using Altera authentication)
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Size: 1152000 |
Author: 哈哈!
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Description: I2c verilog语言,在开发板上验证过的FPGA端代码程序;(Altera flatform, use verilog code i2c, test ok.)
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Size: 1008640 |
Author: 武哥
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