Search - I2C master verilog

[Windows Develop] i2c_master_verilog

Description: i2c master code for verilog-i2c master code for Verilog
Platform: | Size: 247808 | Author: zhang chi | Hits:

[VHDL-FPGA-Verilog] i2c_slave_model_verilog

Description: 一般网站上都有i2c master模块的代码,但很少有slave的代码,这里就是slave的代码,非常有用.-general website have i2c master module of code, but very few slave code, This is the slave code, very useful.
Platform: | Size: 2048 | Author: hxwf801 | Hits:

[Com Port] i2c_master

Description: 一个好用的I2C接口master的verilog程序。 -A master-to-use interface for Verilog I2C procedures.
Platform: | Size: 4096 | Author: 王晓琴 | Hits:

[VHDL-FPGA-Verilog] I2C_HDL

Description: I2C bus HDL source and testbench
Platform: | Size: 701440 | Author: liuKe | Hits:

[VHDL-FPGA-Verilog] i2c_Sample

Description: verilog在cpld上实现i2c主从设备通讯功能-Verilog CPLD achieved in i2c master-slave communication equipment
Platform: | Size: 718848 | Author: nedazq | Hits:

[VHDL-FPGA-Verilog] I2C

Description: 用verilog HDL实现I2C Master Controller 的设计，包括主程序设计和测试程序设计-Verilog HDL using I2C Master Controller to achieve the design, including the main program design and test program design
Platform: | Size: 211968 | Author: zbs | Hits:

[Embeded-SCM Develop] i2c_core

Description: I2C core 及testbench（verilog）-I2C core and testbench [verilog]
Platform: | Size: 20480 | Author: xiaoheng | Hits:

[VHDL-FPGA-Verilog] I2C

Description: I2C主机端模块具有avalon-MT总线接口可挂载在Altera soc系统之上使NiosII处理器具备I2C通信能力模块由Verilog HDL编写并经Cyclone II FPGA测试-I2C master modul which has a avalon-MT interface that can be attached to Altera SOC system. It provides NiosII I2C communication capability . This module is written with Verilog HDL and has been tested on a Cyclone II FPGA
Platform: | Size: 6144 | Author: magic_andy | Hits:

[VHDL-FPGA-Verilog] i2c_master_slave_core

Description: I2C master/slave IP core
Platform: | Size: 2180096 | Author: zhanglh | Hits:

[Shell api] i2cslave_latest.tar

Description: hi this is i2c master in verilog
Platform: | Size: 1298432 | Author: praveen | Hits:

[VHDL-FPGA-Verilog] Chapter6-9

Description: 第六章到第九章的代码本书通过100多个模块实例，详细地讲解了Verilog HDL程序设计语言，全书共分13章，内容涉及VerilogHDL语言基本概念、建模、同步设计、异步设计、功能验证等，实例包括各种加法器/计数器、乘法器/除法器、编码器/译码器、状态机、SPIMaster Controller、I2C Master controller、CAN ProtocolController、Memory模块、JPEG图像压缩模块、加密模块、ATA控制器、8位RISC-CPU等及各个实例模块相应的Testbench，所举实例具有很强的实用性和代表性，每个实例均给出了介绍、功能分析、程序代码和结果演示。-Chapter VI to Chapter IX of the code in this book through more than 100 module instance, explain in detail the Verilog HDL programming language, the book is divided into 13 chapters, covering basic concepts VerilogHDL languages, modeling, synchronous design, asynchronous design, functional verification, etc. Examples include a variety of adder/counter, multiplier/divider, encoders/decoders, state machines, SPIMaster Controller, I2C Master controller, CAN ProtocolController, Memory modules, JPEG image compression module, encryption module, ATA controller, 8-bit RISC-CPU, etc. and the various instances of the corresponding module Testbench, The examples are highly practical and representation, each instance of it all gives the introduction, functional analysis, program code and results presentation.
Platform: | Size: 6281216 | Author: xiao | Hits:

[VHDL-FPGA-Verilog] Chapter10

Description: 第十章的代码。本书通过100多个模块实例，详细地讲解了Verilog HDL程序设计语言，全书共分13章，内容涉及VerilogHDL语言基本概念、建模、同步设计、异步设计、功能验证等，实例包括各种加法器/计数器、乘法器/除法器、编码器/译码器、状态机、SPIMaster Controller、I2C Master controller、CAN ProtocolController、Memory模块、JPEG图像压缩模块、加密模块、ATA控制器、8位RISC-CPU等及各个实例模块相应的Testbench，所举实例具有很强的实用性和代表性，每个实例均给出了介绍、功能分析、程序代码和结果演示-Chapter X code. This book by more than 100 module instance, explain in detail the Verilog HDL programming language, the book is divided into 13 chapters, covering basic concepts VerilogHDL languages, modeling, synchronous design, asynchronous design, functional verification, etc. Examples include a variety of additions device/counters, multipliers/dividers, encoders/decoders, state machines, SPIMaster Controller, I2C Master controller, CAN ProtocolController, Memory modules, JPEG image compression module, encryption module, ATA controller, 8-bit RISC-CPU etc. and the various instances of the corresponding module Testbench, The examples are highly practical and representation, each instance of it all gives the introduction, functional analysis, program code and the results demonstrate
Platform: | Size: 6872064 | Author: xiao | Hits:

[VHDL-FPGA-Verilog] i2c_master

Description: 测试i2c总线的主机代码，可以测试从机的功能，很方便使用-verilog cold i2c master
Platform: | Size: 10240 | Author: haichao | Hits:

[VHDL-FPGA-Verilog] I2C_code

Description: 与IP核配套的I2C-Master Core，包含了目前主流FPGA芯片的I2C实现，代码包括Altera/Xilinx/OpenCore等公司的VHDL/Verilog/C等。-I2C-Master Core
Platform: | Size: 3256320 | Author: summerooooo | Hits:

[VHDL-FPGA-Verilog] i2c

Description: I2C verilog代码，支持master和slave方式，内置CPU接口-I2C verilog RTL code， support master and slave mode
Platform: | Size: 13312 | Author: dingyy | Hits:

[VHDL-FPGA-Verilog] I2C-Master-_-Slave-Core

Description: 用verilog 实现的 iic 总线编程，包括master，和slave的编程，很详细的iic总线编程-Iic-bus implemented using verilog programming, including the master, and slave programming, a very detailed iic-bus programming
Platform: | Size: 2181120 | Author: 郭天然 | Hits:

[VHDL-FPGA-Verilog] module-i2c

Description: I2C MASTER CODE FOR VERILOG AND FGPA IMPLEMENTATION.I WILL SUPPLY FULL CODE IF NE-I2C MASTER CODE FOR VERILOG AND FGPA IMPLEMENTATION.I WILL SUPPLY FULL CODE IF NEEDED
Platform: | Size: 9216 | Author: max | Hits:

[VHDL-FPGA-Verilog] i2c-master

Description: I2C Master Code in Verilog using Finite State Machine.
Platform: | Size: 4096 | Author: Shekhar Jha | Hits:

[VHDL-FPGA-Verilog] i2c-master

Description: i2c 总线 host 控制器， fpga上验证过，可以实现i2c 通信。-verilog IP for i2c master controller
Platform: | Size: 978944 | Author: guoqingsheng | Hits:

[VHDL-FPGA-Verilog] altera_avalon_i2c

Description: avalon转i2c总线Verilog代码(i2c master Verilog code)
Platform: | Size: 11264 | Author: 逐末 | Hits:

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[Windows Develop] i2c_master_verilog

[VHDL-FPGA-Verilog] i2c_slave_model_verilog

[Com Port] i2c_master

[VHDL-FPGA-Verilog] I2C_HDL

[VHDL-FPGA-Verilog] i2c_Sample

[VHDL-FPGA-Verilog] I2C

[Embeded-SCM Develop] i2c_core

[VHDL-FPGA-Verilog] I2C

[VHDL-FPGA-Verilog] i2c_master_slave_core

[Shell api] i2cslave_latest.tar

[VHDL-FPGA-Verilog] Chapter6-9

[VHDL-FPGA-Verilog] Chapter10

[VHDL-FPGA-Verilog] i2c_master

[VHDL-FPGA-Verilog] I2C_code

[VHDL-FPGA-Verilog] i2c

[VHDL-FPGA-Verilog] I2C-Master-_-Slave-Core

[VHDL-FPGA-Verilog] module-i2c

[VHDL-FPGA-Verilog] i2c-master

[VHDL-FPGA-Verilog] i2c-master

[VHDL-FPGA-Verilog] altera_avalon_i2c

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