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[File Formatata-7v3-r0

Description: IDE硬盘接口规格书,详细介绍了IDE接口的定义及与外围设备的连接电路图-IDE hard disk interface specifications, detailing the IDE interface definition and peripheral equipment and the connection circuit
Platform: | Size: 965632 | Author: Jason | Hits:

[Embeded-SCM Developadda_spi

Description: 这个源码是用altera公司的开发工具NIOS II IDE开发的基于软核处理器的AD、DA控制程序,通过spi 核控制AD、DA的时序,实现正弦波发送和接收-this source is altera company development tools NIOS II IDE- based soft-core Office JIMMY of AD and DA control procedures, spi nuclear control AD and DA timetables to achieve sine sending and receiving
Platform: | Size: 66560 | Author: zeng xuan | Hits:

[VHDL-FPGA-Verilogocidec3_IDE_controller

Description: 硬盘控制器VHDL源代码,实现了PIO和DMA方式,请支持-hard disk controller VHDL source code and realized the PIO and DMA mode, please support
Platform: | Size: 38912 | Author: | Hits:

[Embeded-SCM Developvhdlcodes2

Description: FPGA/CPLD集成开发环境ISE使用详解实例-2-FPGA/CPLD integrated development environment IDE ISE examples-2
Platform: | Size: 17408 | Author: 邓志斌 | Hits:

[Embeded-SCM Developvhdlcodes3

Description: FPGA/CPLD集成开发环境ISE使用详解实例-3-FPGA/CPLD integrated development environment IDE ISE example-3
Platform: | Size: 74752 | Author: 邓志斌 | Hits:

[Embeded-SCM Developvhdlcodes4

Description: FPGA/CPLD集成开发环境ISE使用详解实例-4-FPGA/CPLD integrated development environment IDE ISE example-4
Platform: | Size: 149504 | Author: 邓志斌 | Hits:

[Embeded-SCM Developvhdlcodes5

Description: FPGA/CPLD集成开发环境ISE使用详解实例-5-FPGA/CPLD integrated development environment IDE ISE example-5
Platform: | Size: 152576 | Author: 邓志斌 | Hits:

[Embeded-SCM Developvhdlcdes6

Description: FPGA/CPLD集成开发环境ISE使用详解实例-6-FPGA/CPLD integrated development environment IDE ISE example-6
Platform: | Size: 19456 | Author: 邓志斌 | Hits:

[Embeded-SCM Developvhdlcodes7

Description: FPGA/CPLD集成开发环境ise的使用详解 示例代码7-FPGA/CPLD integrated development environment IDE ise the sample code 7
Platform: | Size: 95232 | Author: bigbibby | Hits:

[Embeded-SCM Developvhdlcodes8

Description: FPGA/CPLD集成开发环境ise的使用详解 示例代码8-FPGA/CPLD integrated development environment IDE ise the sample code 8
Platform: | Size: 15360 | Author: bigbibby | Hits:

[Embeded-SCM Developvhdlcodes10

Description: FPGA/CPLD集成开发环境ise的使用详解 示例代码10-FPGA/CPLD integrated development environment IDE ise the example code 10
Platform: | Size: 8192 | Author: bigbibby | Hits:

[Embeded-SCM Developvhdlcodes11

Description: FPGA/CPLD集成开发环境ise的使用详解 示例代码-FPGA/CPLD integrated development environment IDE ise the example code
Platform: | Size: 4096 | Author: bigbibby | Hits:

[Multimedia programnova.tar

Description: video decoder full hardware
Platform: | Size: 746496 | Author: esl | Hits:

[Graph program111186722VGAcontroler_for_Sopc_Builder

Description: vga图像彩条vhdl程序设计,希望对大家有所帮助!-image vga color VHDL programming, want to be helpful to everyone!
Platform: | Size: 95232 | Author: catherine | Hits:

[Driver Developidecontroller

Description: ide controller 实现PIO 和DMA方式的硬盘接口控制器-ide controller
Platform: | Size: 38912 | Author: fangming | Hits:

[VHDL-FPGA-VerilogxilinxIDE

Description: xilinx fpga 下的IDE控制器原代码,贡献一起学习-xilinx fpga controller under the IDE source code and contribute to study together
Platform: | Size: 31744 | Author: fangming | Hits:

[VHDL-FPGA-Verilogide

Description: ide 的HDL描述.有接口和时续-HDL description of the ide. when there is interface and continued
Platform: | Size: 5806080 | Author: zfq | Hits:

[Linux-UnixLinux_bc

Description: 对vga接口做了详细的介绍,并且有一 ·三段式Verilog的IDE程序,但只有DMA ·电子密码锁,基于fpga实现,密码正 ·IIR、FIR、FFT各模块程序设计例程, ·基于逻辑工具的以太网开发,基于逻 ·自己写的一个测温元件(ds18b20)的 ·光纤通信中的SDH数据帧解析及提取的 ·VHDL Programming by Example(McGr ·这是CAN总线控制器的IP核,源码是由 ·FPGA设计的SDRAM控制器,有仿真代码 ·xilinx fpga 下的IDE控制器原代码, ·用verilog写的,基于查表法实现的LO ·精通verilog HDL语言编- up:in STD_LOGIC down:in STD_LOGIC run_stop:in STD_LOGIC wai_t: in std_logic_vector(2 downto 0) lift:in std_logic_vector(2 downto 0) ladd: out std_logic_vector(1 downto 0) ) end control
Platform: | Size: 18683904 | Author: liuzhou | Hits:

[VHDL-FPGA-VerilogSOPC_NIOS_TEST

Description: ALTER+NIOS II+SOPC_Builder+NIOS II IDE例程(VHDL)-ALTER+ NIOS II+ SOPC_Builder+ NIOS II IDE routines (VHDL)
Platform: | Size: 10610688 | Author: cmlin | Hits:

[ARM-PowerPC-ColdFire-MIPSLED

Description: 在ALTERA的DE 2 开发板上做的一个类似闪烁的彩灯,用了16个LEDR,可以直接下载到板子上运行,基于经典的开发平台Quartus II+SOPC Builder+Nios II IDE 做的,只要看了以后,你就会自己设计各种花样的彩灯闪烁的样子了.所用语言有多种,VHDL,C/C++等-DE 2 in the development of the ALTERA board to do a similar flickering lantern, with a 16 LEDR, can be directly downloaded to the board on the operation of the development platform based on the classic Quartus II+ SOPC Builder+ Nios II IDE to do, just have to look at After, you will design their own patterns of lanterns flicker the same again. There are a variety of language, VHDL, C/C++, etc.
Platform: | Size: 4208640 | Author: liguoyin | Hits:
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