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[VHDL-FPGA-Verilog] DS1307_LCD

Description: 通过IIC总线读写实时时钟DS1307，并把时、分、秒显示在12864液晶屏上，用的CycloneII EP2C8，Quartus环境-Through the IIC bus read and write real-time clock, DS1307, and the hours, minutes and seconds displayed on the LCD screen on the 12864, used CycloneII EP2C8, Quartus environment
Platform: | Size: 1311744 | Author: iversn | Hits:

[VHDL-FPGA-Verilog] iic.cx

Description: 本帖最后由 NovaCao 于 1-18-2009 18:02 编辑 使用Quartus II进行仿真 QQ：44425312 QQ群：50585234（群名称：FPGA4u） gtalk：fpgaforu@gmail.com 网站：www.fpga4u.com 淘宝网店：http://shop34914329.taobao.com/ 我们以一个计数器为例，在QuartusII中对其进行仿真。 打开Quartus II，新建一个工程，新建Verilog HDL文件 -This quote was last NovaCao on 1-18-2009 18:02 by editing the use of Quartus II simulation QQ: 44425312 QQ Group: 50,585,234 (group name: FPGA4u) gtalk: fpgaforu@gmail.com Website: www.fpga4u.com Taobao shop : http://shop34914329.taobao.com/ us to a counter example, in QuartusII in its simulation. Open the Quartus II, create a new project, the new Verilog HDL files
Platform: | Size: 5120 | Author: 倪萍波 | Hits:

[VHDL-FPGA-Verilog] sopcIIC

Description: 该例子是基于sopc的IIC总线设计完整设计，分为硬件和软件部分，软件部分是用c语言编写的。该项目是个以完成的项目，据有较高的参考和经济价值。该例子是原来做过的项目。 整个项目是在Quartus II 7.0和nios IDE环境下开发。-This example is based on the IIC bus design sopc complete design, divided into hardware and software, the software part is written in c language. The project is to complete the project, according to the reference and a higher economic value. The example is a project originally done. The whole project is in the Quartus II 7.0 and the nios IDE development environment.
Platform: | Size: 13532160 | Author: bobo | Hits:

[VHDL-FPGA-Verilog] Verilog-IIC

Description: VerilogHDL语言编写的IIC 读写试验程序, 在Quartus II 8.1下面调试通过 -IIC VerilogHDL languages to read and write test procedures, the Quartus II 8.1 debugging through the following
Platform: | Size: 473088 | Author: Joseph | Hits:

[VHDL-FPGA-Verilog] i2c_master_slave_core_latest.tar

Description: IIC IP核，可以直接集成在SOPC中的(⊙o⊙)哦-基于Quartus II 可直接集成到SOPC，自定义II C IP核
Platform: | Size: 4562944 | Author: zy | Hits:

[VHDL-FPGA-Verilog] iic

Description: 使用verilog编写的IIC程序，在Quartus中调试通过，初学者可以参考。-Verilog prepared IIC program in Quartus through debugging, and beginners can refer to.
Platform: | Size: 3072 | Author: 张亚洲 | Hits:

[Other] IIC_write_one_bite_read_random

Description: 本实验通过IIC协议完成对EEPROM的操控，进行单字节的写入和随机的读取。-Module Name : IIC通信实验 //Engineer : WHN //Target Versions : EP2C8Q208C8 //Create Date : Quartus II 11.0 //Revision : V1.0 //Description : 本实验通过IIC协议完成对EEPROM的操控，进行单字节的 // 的写入和随机的读取。下面是顶层连线的代码 //Finish Time : 2013年8月14日
Platform: | Size: 780288 | Author: 汪皓楠 | Hits:

[VHDL-FPGA-Verilog] PCF8563

Description: quartus ii 实时时钟pcf8563工程及源码 Verilog hdl 实现iic总线-quartusii realtime pcf8563 project and code and IIC verilog hdl
Platform: | Size: 74752 | Author: zhaoyulong | Hits:

[VHDL-FPGA-Verilog] zhixinkeji

Description: 北京至芯科技FPGA的学习资料，从备战Quartus II安装到IIC通信协议，每一章都有Verilog代码并且可以实现仿真程序，非常好用，讲的很详细-Beijing Science and Technology FPGA to the core learning materials, preparing to install Quartus II IIC communication protocol, each chapter Verilog code and can achieve simulation program, very easy to use, said very detailed
Platform: | Size: 23173120 | Author: 李浩轩 | Hits:

[VHDL-FPGA-Verilog] verilogiic1121

Description: tvp5150视频解码，平台quartus II(tvp5150 Video decoding,quartus II)
Platform: | Size: 481280 | Author: 伽昇 | Hits:

[VHDL-FPGA-Verilog] AT24C02_IIC

Description: Quartus II 项目，AT24C02 IIC通信接口，可实现读写功能。(This zip contains an AT24C02 IIC interface, which can read from 24c02 and write data into it.)
Platform: | Size: 7487488 | Author: 蝠蝙 | Hits:

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