Description: 用MFC编写,实现的功能有:
i. 打开256色的BMP格式的图像文件：
ii. 图像的傅立叶变换：
iii.
直方图均衡化：
iv. 图像的中值滤波
v. 图像的边缘检测
vi. 几何变换
vii. 哈夫
曼编码查看：
viii. 直方图查看
ix. 用哈夫曼压缩方法对图像进行压缩并生成压缩文件
另外还有课设论文及重要模块流程图。有一定
的参考价值
-prepared using MFC, the functions are : i. Open 256-color BMP image file formats : ii. the Fourier Transform Image : iii. histogram equalization : iv. Image median filtering v. Image Edge Detection vi. Geometric Transforms vii. Huffman coding View : viii. histogram View ix. Huffman compression method used to compress images and generate compressed files another lesson based papers and important module flowchart. There will be some reference value Platform: |
Size: 848700 |
Author:斯蒂芬 |
Hits:
Description: Wavelets have widely been used in many signal and image processing applications. In this paper, a new
serial-parallel architecture for wavelet-based image compression is introduced. It is based on a 4-tap wavelet
transform, which is realised using some FIFO memory modules implementing a pixel-level pipeline
architecture to compress and decompress images. The real filter calculation over 4 · 4 window blocks is
done using a tree of carry save adders to ensure the high speed processing required for many applications.
The details of implementing both compressor and decompressor sub-systems are given. The primarily analysis
reveals that the proposed architecture, implemented using current VLSI technologies, can process a
video stream in real time.-Wavelets have been widely used in many sign al and image processing applications. In this p aper. a new serial-parallel architecture for wavele t-based image compression is introduced. It is based on a 4-tap wavelet transform. which is realized using some FIFO memory module 's implementing a pixel-level pipeline archite cture to compress and decompress images. The're al filter calculation over 4 blocks window is done using a tree of carry save adders to ensure t he high speed processing required for many appl ications. The details of implementing both com pressor decompressor and sub-systems are give n. The primarily analysis reveals that the prop osed architecture, VLSI implemented using current technologies, can process a video stream in real time. Platform: |
Size: 2837459 |
Author:sdfafaf |
Hits:
Description: 用MFC编写,实现的功能有:
i. 打开256色的BMP格式的图像文件：
ii. 图像的傅立叶变换：
iii.
直方图均衡化：
iv. 图像的中值滤波
v. 图像的边缘检测
vi. 几何变换
vii. 哈夫
曼编码查看：
viii. 直方图查看
ix. 用哈夫曼压缩方法对图像进行压缩并生成压缩文件
另外还有课设论文及重要模块流程图。有一定
的参考价值
-prepared using MFC, the functions are : i. Open 256-color BMP image file formats : ii. the Fourier Transform Image : iii. histogram equalization : iv. Image median filtering v. Image Edge Detection vi. Geometric Transforms vii. Huffman coding View : viii. histogram View ix. Huffman compression method used to compress images and generate compressed files another lesson based papers and important module flowchart. There will be some reference value Platform: |
Size: 848896 |
Author:斯蒂芬 |
Hits:
Description: Wavelets have widely been used in many signal and image processing applications. In this paper, a new
serial-parallel architecture for wavelet-based image compression is introduced. It is based on a 4-tap wavelet
transform, which is realised using some FIFO memory modules implementing a pixel-level pipeline
architecture to compress and decompress images. The real filter calculation over 4 · 4 window blocks is
done using a tree of carry save adders to ensure the high speed processing required for many applications.
The details of implementing both compressor and decompressor sub-systems are given. The primarily analysis
reveals that the proposed architecture, implemented using current VLSI technologies, can process a
video stream in real time.-Wavelets have been widely used in many sign al and image processing applications. In this p aper. a new serial-parallel architecture for wavele t-based image compression is introduced. It is based on a 4-tap wavelet transform. which is realized using some FIFO memory module 's implementing a pixel-level pipeline archite cture to compress and decompress images. The're al filter calculation over 4 blocks window is done using a tree of carry save adders to ensure t he high speed processing required for many appl ications. The details of implementing both com pressor decompressor and sub-systems are give n. The primarily analysis reveals that the prop osed architecture, VLSI implemented using current technologies, can process a video stream in real time. Platform: |
Size: 2837504 |
Author:sdfafaf |
Hits:
Description: The QccPackSPECK module is a optional addon to the QccPack library for
the quantization, compression and coding of data. -The QccPackSPECK module is a optional addon to the QccPack library for
the quantization, compression and coding of data. The QccPackSPECK module
provides an implementation of the Set-Partitioning Embedded Block (SPECK)
algorithm for image compression. Since the SPECK algorithm is patented,
it is made available here under special license terms (see below and the
file LICENSE-SPECK), whereas the QccPack library is licensed under the GNU
General Public License and the GNU Library General Public License. See the
file CHANGELOG-SPECK for details of recent changes to the QccPackSPECK code. Platform: |
Size: 96256 |
Author:jason.. |
Hits:
Description: 第一章到第五章的代码
本书通过100多个模块实例，详细地讲解了Verilog HDL程序设计语言，全书共分13章，内容涉及VerilogHDL语言基本概念、建模、同步设计、异步设计、功能验证等，实例包括各种加法器/计数器、乘法器/除法器、编码器/译码器、状态机、SPIMaster Controller、I2C Master controller、CAN ProtocolController、Memory模块、JPEG图像压缩模块、加密模块、ATA控制器、8位RISC-CPU等及各个实例模块相应的Testbench，所举实例具有很强的实用性和代表性，每个实例均给出了介绍、功能分析、程序代码和结果演示。-Chapter to Chapter V of the code in this book through more than 100 module instance, explain in detail the Verilog HDL programming language, the book is divided into 13 chapters, covering basic concepts VerilogHDL languages, modeling, synchronous design, asynchronous design, function authentication, etc. Examples include a variety of adder/counter, multiplier/divider, encoders/decoders, state machines, SPIMaster Controller, I2C Master controller, CAN ProtocolController, Memory modules, JPEG image compression module, encryption module, ATA controller, 8-bit RISC-CPU, etc. and the various instances of the corresponding module Testbench, The examples are highly practical and representation, each instance of it all gives the introduction, functional analysis, program code and results presentation. Platform: |
Size: 1580032 |
Author:xiao |
Hits:
Description: 第六章到第九章的代码
本书通过100多个模块实例，详细地讲解了Verilog HDL程序设计语言，全书共分13章，内容涉及VerilogHDL语言基本概念、建模、同步设计、异步设计、功能验证等，实例包括各种加法器/计数器、乘法器/除法器、编码器/译码器、状态机、SPIMaster Controller、I2C Master controller、CAN ProtocolController、Memory模块、JPEG图像压缩模块、加密模块、ATA控制器、8位RISC-CPU等及各个实例模块相应的Testbench，所举实例具有很强的实用性和代表性，每个实例均给出了介绍、功能分析、程序代码和结果演示。-Chapter VI to Chapter IX of the code in this book through more than 100 module instance, explain in detail the Verilog HDL programming language, the book is divided into 13 chapters, covering basic concepts VerilogHDL languages, modeling, synchronous design, asynchronous design, functional verification, etc. Examples include a variety of adder/counter, multiplier/divider, encoders/decoders, state machines, SPIMaster Controller, I2C Master controller, CAN ProtocolController, Memory modules, JPEG image compression module, encryption module, ATA controller, 8-bit RISC-CPU, etc. and the various instances of the corresponding module Testbench, The examples are highly practical and representation, each instance of it all gives the introduction, functional analysis, program code and results presentation. Platform: |
Size: 6281216 |
Author:xiao |
Hits:
Description: 第十章的代码。
本书通过100多个模块实例，详细地讲解了Verilog HDL程序设计语言，全书共分13章，内容涉及VerilogHDL语言基本概念、建模、同步设计、异步设计、功能验证等，实例包括各种加法器/计数器、乘法器/除法器、编码器/译码器、状态机、SPIMaster Controller、I2C Master controller、CAN ProtocolController、Memory模块、JPEG图像压缩模块、加密模块、ATA控制器、8位RISC-CPU等及各个实例模块相应的Testbench，所举实例具有很强的实用性和代表性，每个实例均给出了介绍、功能分析、程序代码和结果演示-Chapter X code. This book by more than 100 module instance, explain in detail the Verilog HDL programming language, the book is divided into 13 chapters, covering basic concepts VerilogHDL languages, modeling, synchronous design, asynchronous design, functional verification, etc. Examples include a variety of additions device/counters, multipliers/dividers, encoders/decoders, state machines, SPIMaster Controller, I2C Master controller, CAN ProtocolController, Memory modules, JPEG image compression module, encryption module, ATA controller, 8-bit RISC-CPU etc. and the various instances of the corresponding module Testbench, The examples are highly practical and representation, each instance of it all gives the introduction, functional analysis, program code and the results demonstrate Platform: |
Size: 6872064 |
Author:xiao |
Hits:
Description: 第十一章到第十三章的代码
本书通过100多个模块实例，详细地讲解了Verilog HDL程序设计语言，全书共分13章，内容涉及VerilogHDL语言基本概念、建模、同步设计、异步设计、功能验证等，实例包括各种加法器/计数器、乘法器/除法器、编码器/译码器、状态机、SPIMaster Controller、I2C Master controller、CAN ProtocolController、Memory模块、JPEG图像压缩模块、加密模块、ATA控制器、8位RISC-CPU等及各个实例模块相应的Testbench，所举实例具有很强的实用性和代表性，每个实例均给出了介绍、功能分析、程序代码和结果演示。-Chapter XI to the 13th chapter of the code in this book through more than 100 module instance, explain in detail the Verilog HDL programming language, the book is divided into 13 chapters, covering basic concepts VerilogHDL languages, modeling, synchronous design, asynchronous design, functional verification, etc. Examples include a variety of adder/counter, multiplier/divider, encoders/decoders, state machines, SPIMaster Controller, I2C Master controller, CAN ProtocolController, Memory modules, JPEG image compression module, encryption module, ATA controller, 8-bit RISC-CPU, etc. and the various instances of the corresponding module Testbench, The examples are highly practical and representation, each instance of it all gives the introduction, functional analysis, program code and results presentation. Platform: |
Size: 5088256 |
Author:xiao |
Hits:
Description: The code implements the following paper:
Guorong Xuan, Jiang Zhu, Jidong Chen, Shi Y.Q., Zhicheng Ni, Wei Su, "Distortionless data hiding based on integer wavelet transform" IET Electronics Letters, Volume: 38, Issue 25, page 1646- 1648, December 2002. (ISSN: 0013-5194)
The watermark embedding and extraction modules have been implemented separately.
The watermark embedding module embeds the watermark using bitplane compression in the integer wavelet transform domain.
The watermark extraction module extracts the previously embedded watermark and restores the original image.
A logo image is used as a watermark but can be replaced with any thing.-The code implements the following paper:
Guorong Xuan, Jiang Zhu, Jidong Chen, Shi Y.Q., Zhicheng Ni, Wei Su, "Distortionless data hiding based on integer wavelet transform" IET Electronics Letters, Volume: 38, Issue 25, page 1646- 1648, December 2002. (ISSN: 0013-5194)
The watermark embedding and extraction modules have been implemented separately.
The watermark embedding module embeds the watermark using bitplane compression in the integer wavelet transform domain.
The watermark extraction module extracts the previously embedded watermark and restores the original image.
A logo image is used as a watermark but can be replaced with any thing. Platform: |
Size: 1015808 |
Author:thinkingbig4 |
Hits:
Description: 易语言网络聊天源码仿QQ发送自定义图片表情
内附加密压缩模块 皮肤模块 等等大部分是源码
为了成为VIP我拼了！后续还会发给大家很多有用的易语言源码！--Source simulation language network chat easily send custom image expression QQ
Compression module containing a cryptographic module, and so most of the skin source
I fight to become a VIP! Follow-up will be distributed to you a lot of useful source code easy language!-
Platform: |
Size: 2107392 |
Author: |
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Description: ector quantization is a classical quantization technique from signal processing which allows the modeling of probability density functions by the distribution of prototype vectors. It was originally used for data compression. It works by dividing a large set of points (vectors) into groups having approximately the same number of points closest to them. Each group is represented by its centroid point, as in k-means and some other clustering algorithms.
Digital libraries not only consist of text data, but also speech and image data. To compress speech data techniques such as vector quantization (VQ) are used. Platform: |
Size: 6144 |
Author:noopur |
Hits:
Description: 基于Lossy-to-Lossless Image
Compression Based on Reversible Integer TDLT/KLT的压缩算法的matlab实现，在增加ROI编码模块，算法详细可以查看论文《Lossy-to-lossless image compression based on multiplier-less
reversible integer time domain lapped transform》。程序由main.m函数开始运行，输入参数有3个，分别是图像的文件名(该文件夹内的.raw文件)，图像的宽和高。-Lossy-to-Lossless Image Compression Based on Reversible the Integer TDLT/KLT compression algorithm matlab realize increased ROI coding module, the algorithm in detail you can view papers " Lossy-to-lossless image compression based on multiplier-less reversible integer time domain lapped transform " . Program run by the main.m function, three input parameters, the image file name (the file folder. Raw file), the width and height of the image. Platform: |
Size: 1179648 |
Author:huangdacheng |
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Description: propose a novel joint data-hiding
and compression scheme for digital images using side match
vector quantization (SMVQ) and image inpainting. The two
functions of data hiding and image compression can be integrated
into one single module seamlessly. On the sender side, except for
the blocks in the leftmost and topmost of the image, each of the
other residual blocks in raster-scanning order can be embedded
with secret data and compressed simultaneously by SMVQ or
image inpainting adaptively according to the current embedding
bit. Vector quantization is also utilized for some complex blocks
to control the visual distortion and error diffusion caused by the
progressive compression. After segmenting the image compressed
codes into a series of sections by the indicator bits, the receiver
can achieve the extraction of secret bits and image decompression
successfully according to the index values in the segmented
sections. Experimental results demonstrate the effectiveness of
the proposed scheme. Platform: |
Size: 965632 |
Author:bala |
Hits:
Description: 做这个的原因：TinyPNG这个网站大家应该都知道，是一个在线压缩图片的，而且压缩比很高，图片质量也很好，我用过很多压缩工具，对比下来还是这个网站最屌，可是这个网站有时候打开很卡，加载都要等半天，主要是它的CSS、JS文件放在CDN导致的问题，写成软件直接POST上传就可以解决了。
源码介绍：
1.使用精易模块与论坛上开源的 winhttp api模块
2.多线程进度上传、进度下载
3.多文件拖放 (精易模块)
4.解析返回的信息使用json
可供学习的几点：
1.EXUI图标列表框用法
2.多线程处理与线程许可证
3.EXUI图片组用法
4.json用法(The reason for doing this: TinyPNG this site we should all know, is an online image compression, and compression ratio is high, the image quality is also very good, I used a lot of compression tools, contrast down or the site the most cock, but the site is too laggy sometimes open, loading have to wait for a long time, mainly it's CSS The problem caused by the JS file on CDN is solved, and it can be solved by uploading software directly into POST.
Source code introduction:
1. use fine and easy module and open source winhttp API module on forum.
2. multi thread progress upload and schedule downloading
3. multi file drag and drop (easy module)
4. parse the returned information using JSON
Some points for learning:
1.EXUI icon list box usage
2. multi thread processing and thread license
3.EXUI picture group usage
4.json usage) Platform: |
Size: 976896 |
Author:heroaaa123 |
Hits:
Search - IMAGE COMPRESSION MODULE