Search - ISE USB

[Other resource] usbsample

Description: 基于fpga和xinlinx ise的usb端口vhdl程序，希望对你有所帮助！-VHDL program for USB port based fpga and xinlinx ise, wish help for you!
Platform: | Size: 983093 | Author: 王萌 | Hits:

[Other resource] USB_ReferenceDesign

Description: 本程序usb的接口程序，用的工具是ISE,实现usb和pc主机之间的通信，所用的USB芯片是FT245BM.-the procedures usb interface procedure, the ISE tools, pc achieve usb and communications between the mainframe, using a USB chip is FT245BM.
Platform: | Size: 818891 | Author: 陈文祥 | Hits:

[Compress-Decompress algrithms] usb(FPGA)

Description: 基于FPGA的usb程序，采用VHDL语言编写。开发环境为ISE或者MAXPLUS2。-FPGA-based usb procedures, using VHDL language. Development Environment for the ISE or MAXPLUS2.
Platform: | Size: 140480 | Author: 李浩 | Hits:

[Other resource] FPGA-digital-circuit-design

Description: < FPGA数字电子系统设计与开发实例导航> 一书的代码，FPGA数字电子系统设计与开发实例导航,用硬件描述语言编写的，I2C,UART,USB，VGA，CAN-BUS，网络等等的书籍配套原代码。。。。使用方法： 1.拷贝到硬盘。 2.用ISE创建项目，分别加入各个代码文件，即可。
Platform: | Size: 1567644 | Author: 卢桂荣 | Hits:

[Other resource] usb

Description: 这是个USB 的VHDL 程序，进去直接双击ISE 就可以用了
Platform: | Size: 1645077 | Author: 张亚伟 | Hits:

[VHDL-FPGA-Verilog] usbsample

Description: 基于fpga和xinlinx ise的usb端口vhdl程序，希望对你有所帮助！-VHDL program for USB port based fpga and xinlinx ise, wish help for you!
Platform: | Size: 983040 | Author: 王萌 | Hits:

[VHDL-FPGA-Verilog] USB_ReferenceDesign

Description: 本程序usb的接口程序，用的工具是ISE,实现usb和pc主机之间的通信，所用的USB芯片是FT245BM.-the procedures usb interface procedure, the ISE tools, pc achieve usb and communications between the mainframe, using a USB chip is FT245BM.
Platform: | Size: 818176 | Author: 陈文祥 | Hits:

[Compress-Decompress algrithms] usb(FPGA)

Description: 基于FPGA的usb程序，采用VHDL语言编写。开发环境为ISE或者MAXPLUS2。-FPGA-based usb procedures, using VHDL language. Development Environment for the ISE or MAXPLUS2.
Platform: | Size: 140288 | Author: 李浩 | Hits:

[Other resource] FPGA-digital-circuit-design

Description: < FPGA数字电子系统设计与开发实例导航> 一书的代码，FPGA数字电子系统设计与开发实例导航,用硬件描述语言编写的，I2C,UART,USB，VGA，CAN-BUS，网络等等的书籍配套原代码。。。。使用方法： 1.拷贝到硬盘。 2.用ISE创建项目，分别加入各个代码文件，即可。-<FPGA digital electronic systems design and development examples of navigation> a book code, FPGA digital electronic systems design and development examples of navigation, using hardware description languages, I2C, UART, USB, VGA, CAN-BUS, network books, etc. matching the original code. . . . Usage: 1. Copy to your hard disk. 2. With ISE to create the project, respectively, to the various code files, you can.
Platform: | Size: 1567744 | Author: 卢桂荣 | Hits:

[VHDL-FPGA-Verilog] usb

Description: 这是个USB 的VHDL 程序，进去直接双击ISE 就可以用了-This is a USB-VHDL procedures, into direct ISE can use double-click the
Platform: | Size: 1644544 | Author: 张亚伟 | Hits:

[VHDL-FPGA-Verilog] FPGACPLD

Description: FPGA数字电子系统设计与开发实例导航> 一书的代码，FPGA数字电子系统设计与开发实例导航,用硬件描述语言编写的，I2C,UART,USB，VGA，CAN-BUS，网络等等的书籍配套原代码。。。。使用方法： 1.拷贝到硬盘。 2.用ISE创建项目，分别加入各个代码文件，即可
Platform: | Size: 175104 | Author: bbc | Hits:

[VHDL-FPGA-Verilog] USB

Description: Verilog实现的USB程序，用ISE打开工程文件即可-Verilog implementation USB program, open the project file with the ISE can be
Platform: | Size: 140288 | Author: Roy | Hits:

[VHDL-FPGA-Verilog] fpga

Description: fpga数字电子系统设计与开发 ISE I2C UART usb vga -ISE I2C UART usb vga
Platform: | Size: 1559552 | Author: xiong | Hits:

[VHDL-FPGA-Verilog] USB

Description: 用VHDL编写实现的USB接口控制器源码，自带testbench，解压后用ISE打开工程文件即可。-Prepared with the VHDL source code to achieve the USB interface controller, bring their own testbench, after decompression project file can be opened with the ISE.
Platform: | Size: 156672 | Author: 陈阳 | Hits:

[SCM] ccd

Description: 高速高分辨率CCD器件的实用化是近年图像采集领域的一个研究热点。选用科学级柯达新型高分辨率可见光面阵CCD KA I- 0304设计了一种高速图像采集系统。该系统采用KSC - 100作为时序发生器驱动面阵CCD 和信号处理器AD9840A, 实现对CCD面阵输出模拟信号的高速A /D转换, 并将信号快速转存至片外SDRAM 存储器, 经USB 采集系统将数据发送到计算机。系统采用相关双采样( CDS)技术滤除信号中的相关噪声, 提高了系统的信噪比, 采集速度达40Mb it / s, 具有集成度高、低噪声、数据传输速度快等特点。经测试, 系统工作稳定, 为高端科学级CCD面阵的实用化提供了一种设计方案。-The applicat ion of h igh speed and high reso lution CCD is a research ho tspot in im age ac􀀁 quisit ion fie ld. A high speed image acqu isition system is introduced and designed by using a new high reso lution sc ientific leve l v isible light area CCD KA I- 0304. In the design, area CCD and signa l processor AD9840A are driven by using KSC- 100 as the tim ing and driv ing c ircuit and then the conversion o f h igh speed A /D for the CCD output o f analog signal is performed. The generated data signa l is qu ickly transferred to ex terna l SDRAM m emory. Fina lly, data w ill be sent to a computer via USB acqu isition system. Furthermo re, correlated double sampling( CDS) techno logy is adopted in the sys􀀁 tem to remove the relevant signa l no ise and the signal- to- no ise ration( SNR) is improved. The acqui􀀁 sition speed is up to 40Mbit/s. The system is featured by high integration, low no ise, h igh speed data transm ission. A fter test ing, the s
Platform: | Size: 259072 | Author: 胡 | Hits:

[VHDL-FPGA-Verilog] USB

Description: USB控制器的VERILOG工程文件，工程为ISE的，可以编译通过，压箱底的东西了-USB controller VERILOG project file, works for the ISE, you can compile, pressure bottom of things
Platform: | Size: 156672 | Author: mike | Hits:

[VHDL-FPGA-Verilog] jibenmendianlu

Description: 熟悉使用 ISE 软件进行简单的VHDL 文本方式设计，学习使用USB 电缆或并口下载线下载逻辑电路到FPGA，并能调试电路使其正常工作。熟悉数字电路集成设计的过程。-Familiar with ISE software to design a simple VHDL text, learning to use a USB cable or parallel port download cable Download logic to the FPGA, and can debug the circuit to work properly. Familiar with digital integrated circuit design process.
Platform: | Size: 770048 | Author: 杨明 | Hits:

[VHDL-FPGA-Verilog] duolufuyongqi

Description: 1. 学习使用 ISE 软件，并用VHDL 语言设计多路复用器； 2. 使用 USB 电缆下载逻辑电路到FPGA，并能根据电路原理调试电路使其正常工作； 3. 掌握数字电路集成设计的过程-1 Learn to use ISE software, and design using VHDL language multiplexer (2) using a USB cable to download logic to the FPGA, and debug circuit according to circuit theory it to work 3 the digital integrated circuit design process. .
Platform: | Size: 87040 | Author: 杨明 | Hits:

[VHDL-FPGA-Verilog] USB

Description: 基于XILINX+ISE+14.1的usb协议设计-Usb protocol design based on XILINX+ISE+14.1
Platform: | Size: 140288 | Author: sun | Hits:

[USB develop] USB-IPcore-Verilog

Description: USB IP 核设计，Verilog，ISE工程可以打开-USB IP core design, Verilog, ISE project can be opened
Platform: | Size: 5345280 | Author: 赵海峰 | Hits:

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[Other resource] usbsample

[Other resource] USB_ReferenceDesign

[Compress-Decompress algrithms] usb(FPGA)

[Other resource] FPGA-digital-circuit-design

[Other resource] usb

[VHDL-FPGA-Verilog] usbsample

[VHDL-FPGA-Verilog] USB_ReferenceDesign

[Compress-Decompress algrithms] usb(FPGA)

[Other resource] FPGA-digital-circuit-design

[VHDL-FPGA-Verilog] usb

[VHDL-FPGA-Verilog] FPGACPLD

[VHDL-FPGA-Verilog] USB

[VHDL-FPGA-Verilog] fpga

[VHDL-FPGA-Verilog] USB

[SCM] ccd

[VHDL-FPGA-Verilog] USB

[VHDL-FPGA-Verilog] jibenmendianlu

[VHDL-FPGA-Verilog] duolufuyongqi

[VHDL-FPGA-Verilog] USB

[USB develop] USB-IPcore-Verilog

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