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Description: 802.3an ldpc码编码、译码设计,使用VERILOG hdl语言编写,包括测试代码,-802.3an ldpc code encoding, decoding the design, use of language VERILOG hdl, including test code,
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Size: 788480 |
Author: 聂样 |
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Description: 802.3an Ethernet 以太网络 LDPC Verilog 网表实现-802.3an Ethernet Ethernet LDPC Verilog netlist to achieve
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Size: 914432 |
Author: |
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Description: LDPC FEC 802.3 support IP Design Note
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Size: 41984 |
Author: Sam |
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Description: 802.3an ldpc decoder
verilog 源码
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Size: 884736 |
Author: 杨振飞 |
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Description: 适用于10GBase-T的以太网(802.3an协议)LDPC解码器, 用VHDL语言编写,可以应用在LATTICEXP2系列芯片上,基于Gallager算法。-LDPC decoder for 10GBase-T Ethernet (802.3an), based on Gallager s A algorithm
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Size: 884736 |
Author: liang |
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Description: 适用于10GBase-T的以太网(802.3an协议)LDPC, VERILOG语言编写,可以应用在LATTICEXP2系列芯片上,基于Gallager算法。-LDPC encoder for 10GBase-T Ethernet (802.3an), based on Gallager s A algorithm
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Size: 620544 |
Author: liang |
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Description: 本程序可仿真IEEE802.16e LDPC编解码器,程序设计原理见本人如下专著。
[1] 肖扬著, Turbo与LDPC编解码及其应用,人民邮电出版社,2010.
[2] 肖扬著, MIMO多天线无线通信系统,人民邮电出版社,2009。
本程序只用于科研,不得用于其它场合。-The program can simulate LDPC codec with IEEE 802.16e LDPC of the size
2256*4512, and 1/2 code rate.
Copyright (C2010-2015) Yang XIAO, Beijing Jiaotong University, Nov.3, 2010, E-Mail: yxiao@bjtu.edu.cn.
Current Version Published: 2010-11-3
In my following books, I derived the algorithm of constructing the parity check matrices of IEEE 802.16e LDPC.
[1] Y. Xiao, Turbo and LDPC Codecs and their Applications, Press of Posts and Telecommunications, Beijing, 2010.
[2] Yang Xiao, MIMO Multiple Antenna Wireless Communication Systems, Press of Posts and Telecommunications, Beijing, 2009.
This program also provides the LDPC code with the size 4512*2256, and 1/2 code.
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Size: 72704 |
Author: 肖扬 |
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