Welcome![Sign In][Sign Up]
Location:
Search - LDPC VHDL implementation

Search list

[Communication-MobileLDPC(VHDL)

Description: 低密度奇偶校验码的VHDL程序,用于LDPC码的硬件实现-LDPC code VHDL program for the LDPC code of hardware implementation
Platform: | Size: 2048 | Author: 赵天婵 | Hits:

[VHDL-FPGA-VerilogLDPC_Behavioral_VHDL

Description: 用VHDL语言编写的LDPC码硬件实现语言,相对于verilog的,比较简单-Using VHDL language LDPC code hardware implementation language, compared to Verilog, and relatively simple
Platform: | Size: 2048 | Author: 王明 | Hits:

[ELanguageldcp_verilog

Description: ldpc verilog 程序 做ldpc硬件实现的可以-ldpc verilog procedures do LDPC hardware implementation can
Platform: | Size: 9216 | Author: nzh | Hits:

[Communication-Mobileldpc

Description: 最近在做毕设,ldpc码的编解码实现,这个是verilog实现。-Recently completed the set up to do, ldpc code codec implementation, this is the Verilog implementation.
Platform: | Size: 9216 | Author: fly | Hits:

[VHDL-FPGA-Verilogcf_ldpc

Description: ldpc码编码、译码设计,使用vhdl语言编写,包括c语言写的测试代码-ldpc code encoding, decoding design, vhdl language use, including testing c language code
Platform: | Size: 65536 | Author: jinghai | Hits:

[VHDL-FPGA-Verilogvhdl

Description: ldpc编码的vhdl的实现,一种802.13的方式-ldpc coding vhdl implementation, a 802.13 a way
Platform: | Size: 6144 | Author: lq | Hits:

[VHDL-FPGA-VerilogRealization_of_FPGA_for_LDPC_encoding

Description: 低密度奇偶校验码(简称LDPC码)是目前距离香农限最近的一种线性纠错码,它的直接编码运算量较大,通常具有码长的二次方复杂度.为此,利用有效的校验矩阵,来降低编码的复杂度,同时研究利用大规模集成电路实现LDPC码的编码.在ISE 8.2软件平台上采用基于FPGA的Verilog HDL语言实现了有效的编码过程,为LDPC码的硬件实现和实际应用提供了依据-Abstract:Low.density parity·check code(LDPC code)is a kind of linear eror·correcting code nearest to Shannon Limit.For LDPC cod e,the computational overhead for direct encoding operations is large,as the complexity of encod ing is the square of the length of codeword.Hence,this paper reduces the complexity of coding by using effective parity—check matrix,and realizes the encoding device for LDPC code by use of large·scale integrated circuits.The effective encoding process based on FPGA with Verilog HDL language is implemented on ISE 8.2 software platform ,providing a feasible basis for hardware implementation an d practical application of LDPC code.
Platform: | Size: 165888 | Author: 秦小星 | Hits:

[matlabLDPC码编译码算法的研究与实现_李会雅

Description: 本文首先介绍了几种LDPC码的编译码算法,同时推导了译码错误概率和密度进化 过程,讨论了信道参数的门限效应。接着对LDPC码二分图中长度为4的环进行了深入 研究,提出了一种LDPC码校验矩阵的消4一环生成算法,采用Matlab和VC++融合编程 方式,完成了此算法的程序设计。此算法不仅可生成二进制LDPC码的校验矩阵,并且 对算法修正后,也可生成多进制LDPC码的校验矩阵。采用此算法后可避免LDPC码译 码过程中的重复迭代,显著提高了短帧LDPC码的误比特率性能。同时对不同参数对 LDPC码性能的影响进行了仿真,得到了一些结论。最后,利用VHDL语言在复杂可编 程逻辑器件(CPLD)上完成了LDPC码编码器的硬件实现。另外,给出了LDPC码译 码器硬件实现的整体结构图,结合对数似然比域内的置信传播迭代译码(LLR-BP)算 法,对译码器的各个模块进行了详细阐述。(Research and implementation of LDPC coding and decoding technology)
Platform: | Size: 1247232 | Author: 斯蓝蓝 | Hits:

CodeBus www.codebus.net