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Description: 一个使用VHDL设计的具有强大功能的32位CPU,这个文件包含了在Altera公司的ep1c20 FPGA的位码文件和配置文件,可以直接下载使用!
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Size: 687193 |
Author: zhao onely |
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Description: 一个使用VHDL设计的具有强大功能的32位CPU,这个文件包含了与之配套的DDR控制器程序!
Platform: |
Size: 753022 |
Author: zhao onely |
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Description: 一个使用VHDL设计的具有强大功能的32位CPU,这个文件包含了在Xilinx公司的ml505 FPGA上的位码文件和配置文件,可以直接下载使用!
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Size: 391428 |
Author: zhao onely |
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Description: 一个使用VHDL设计的具有强大功能的32位CPU,这个文件包含了与之配套的PCI位码文件及配置程序。
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Size: 417128 |
Author: zhao onely |
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Description: 一个航天航空用的Sparc处理器(配美国欧洲宇航局用的R_tems嵌入式操作系统)的VHDL源代码,但不能保证版图设计ASIC成功
-the Sparc processor (fitted with the United States of the European Space Agency R_tems Embedded operating system) VHDL source code, but it can not guarantee success ASIC Layout
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Size: 1873920 |
Author: 韩红 |
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Description: 一个使用VHDL设计的具有强大功能的32位CPU,这个文件包含了在Altera公司的ep1c20 FPGA的位码文件和配置文件,可以直接下载使用!-A VHDL design with the use of powerful 32-bit CPU, this document contains Altera Corporation in the ep1c20 FPGA code and configuration files, you can direct download!
Platform: |
Size: 687104 |
Author: zhao onely |
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Description: 一个使用VHDL设计的具有强大功能的32位CPU,这个文件包含了与之配套的DDR控制器程序!-A VHDL design with the use of powerful 32-bit CPU, this document contains a complete set of DDR controller program!
Platform: |
Size: 752640 |
Author: zhao onely |
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Description: 一个使用VHDL设计的具有强大功能的32位CPU,这个文件包含了与之配套的PCI位码文件及配置程序。-A VHDL design with the use of powerful 32-bit CPU, this document contains a complete set of the PCI code files and configuration procedures.
Platform: |
Size: 416768 |
Author: zhao onely |
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Description: 美国计算机界泰斗级作者Yale N. Patt的LC3 CPU VHDL源码,配合《计算机系统概论》一书学习效果更佳!-The United States computer industry Author greatest level Yale N. Patt of LC3 CPU VHDL source code, with
Platform: |
Size: 11264 |
Author: guo |
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Description: leon3 source code
虽然gaisler网站上有下载,但是提供此代码,希望能与更多的朋友一起学习leon-leon3 source code although gaisler website to download, but the provision of this code, would like to work with more friends with learning leon
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Size: 144384 |
Author: CGF |
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Description: 这个一个基于amba总线的leon3处理器的vhdl语言程序描述,学习fpga总线开发的请看-The amba bus-based processor vhdl language leon3 procedures described in the study developed fpga see bus
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Size: 2048 |
Author: cws |
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Description: CPU+VHDL代码及详细注释\一个老外写的
200多行代码-CPU+ VHDL code and detailed notes \ a foreigner wrote more than 200 lines of code
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Size: 32768 |
Author: 阿德陈 |
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Description: Zipped LEON3 processor VHDL core.
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Size: 1452032 |
Author: AcousticMan |
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Description: leon for 3 fpu. The LEON3 is a synthesisable VHDL model of a 32-bit processor compliant with the SPARC V8 architecture. The model is highly configurable, and particularly suitable for system-on-a-chip (SOC) designs.
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Size: 19076096 |
Author: serg |
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Description: CPU性能仿真测试软件,对于VHDL设计的芯片可以做新能测试-CPU VHDL
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Size: 687104 |
Author: mackalli |
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