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[Software Engineering] 3GPP DL : 0: Update : 2025-02-17 Size : 43kb Publisher : hamza
[Software Engineering] Apply-of-turbo-code-in-LTE.rar DL : 0: turbo码在LTE中的实现，并在fpga中得到了实现,turbo code in LTE implementations, and have been achieved in fpga
Update : 2025-02-17 Size : 5.52mb Publisher : 小刚
[3G develop] 34 DL : 0: TD-SCDMA的长期演进TD-LTE。为减轻TD-LTE综测仪开发中调试的复杂性，通过研究分析TD-LTE系统原语，提出了一种基于DSP TMS320C6455和FPGA 5vsx95tff1136(Xilinx)芯片的原语追踪平台。-Long-term evolution of TD-SCDMA, TD-LTE. TD-LTE system primitives through research and analysis in order to reduce the complexity of debugging in the development of TD-LTE tester, a primitive tracking based on DSP TMS320C6455 and FPGA 5vsx95tff1136 (Xilinx) chip platform.
Update : 2025-02-17 Size : 4kb Publisher : duanyuting
[Exploit] paixu DL : 0: TD-SCDMA的长期演进TD-LTE。为减轻TD-LTE综测仪开发中调试的复杂性，通过研究分析TD-LTE系统原语，提出了一种基于DSP TMS320C6455和FPGA 5vsx95tff1136(Xilinx)芯片的原语追踪平台。-Long-term evolution of TD-SCDMA, TD-LTE. TD-LTE system primitives through research and analysis in order to reduce the complexity of debugging in the development of TD-LTE tester, a primitive tracking based on DSP TMS320C6455 and FPGA 5vsx95tff1136 (Xilinx) chip platform.
Update : 2025-02-17 Size : 427kb Publisher : duanyuting
[3G develop] maopao DL : 0: TD-SCDMA的长期演进TD-LTE。为减轻TD-LTE综测仪开发中调试的复杂性，通过研究分析TD-LTE系统原语，提出了一种基于DSP TMS320C6455和FPGA 5vsx95tff1136(Xilinx)芯片的原语追踪平台。-Long-term evolution of TD-SCDMA, TD-LTE. TD-LTE system primitives through research and analysis in order to reduce the complexity of debugging in the development of TD-LTE tester, a primitive tracking based on DSP TMS320C6455 and FPGA 5vsx95tff1136 (Xilinx) chip platform.
Update : 2025-02-17 Size : 5kb Publisher : duanyuting
[Com Port] paixufahanshu DL : 0: TD-SCDMA的长期演进TD-LTE。为减轻TD-LTE综测仪开发中调试的复杂性，通过研究分析TD-LTE系统原语，提出了一种基于DSP TMS320C6455和FPGA 5vsx95tff1136(Xilinx)芯片的原语追踪平台。-Long-term evolution of TD-SCDMA, TD-LTE. TD-LTE system primitives through research and analysis in order to reduce the complexity of debugging in the development of TD-LTE tester, a primitive tracking based on DSP TMS320C6455 and FPGA 5vsx95tff1136 (Xilinx) chip platform.
Update : 2025-02-17 Size : 221kb Publisher : duanyuting
[Parallel Port] sushu1 DL : 0: TD-SCDMA的长期演进TD-LTE。为减轻TD-LTE综测仪开发中调试的复杂性，通过研究分析TD-LTE系统原语，提出了一种基于DSP TMS320C6455和FPGA 5vsx95tff1136(Xilinx)芯片的原语追踪平台。-Long-term evolution of TD-SCDMA, TD-LTE. TD-LTE system primitives through research and analysis in order to reduce the complexity of debugging in the development of TD-LTE tester, a primitive tracking based on DSP TMS320C6455 and FPGA 5vsx95tff1136 (Xilinx) chip platform.
Update : 2025-02-17 Size : 249kb Publisher : duanyuting
[VHDL-FPGA-Verilog] dsp_core_tx_filter DL : 0: 应用在USRP N210上的XIlinx的FPGA开发板上面的变采样滤波器，实现25--30.72M的变采样滤波器，适应LTE物理层的要求-Application on the USRP N210 FPGA development board above XIlinx variable sampling filter, to achieve 25- 30.72M variable sampling filter, adapt LTE physical layer requirements
Update : 2025-02-17 Size : 3kb Publisher : 何中华
[Software Engineering] LTE-xilinx_PFGA_reference_design DL : 0: xilinx中一整套关于LTE在FPGA下的解决方案，里面涉及到LTE设计的L1层和L2层以及结合其硬件的设计方案和内容，非常利于LTE开发-xilinx set on the LTE solution under the FPGA, which relates to the design of LTE L1 and L2 layers and the combination of the hardware design and content development is beneficial LTE
Update : 2025-02-17 Size : 4.42mb Publisher : yangfan
[Software Engineering] LTE-xilinx_PFGA_reference_design_all DL : 0: xilinx中一整套关于LTE在FPGA下的解决方案，里面涉及到LTE设计的L1层和L2层以及结合其硬件的设计方案和内容，非常利于LTE开发-xilinx set on the LTE solution under the FPGA, which relates to the design of LTE L1 and L2 layers and the combination of the hardware design and content development is beneficial LTE
Update : 2025-02-17 Size : 3.48mb Publisher : yangfan
[Program doc] paper5 DL : 0: LTE基站中PDSCH预映射算法的FPGA实现_杜东振.pdf-FPGA PDSCH pre mapping algorithm in LTE base stations to achieve _ Du Dongzhen.Pdf
Update : 2025-02-17 Size : 930kb Publisher : xiaowang
[3G develop] IC_design DL : 0: 《通信IC设计》一书的随书代码，作者是从事芯片工作，提供了大量的通信底层算法的FPGA代码以及wifi，lte的matlab代码-" Communication IC Design," a book with the book code, the author is engaged in the work of the chip, providing a large number of communication underlying algorithms FPGA code and wifi, lte matlab code
Update : 2025-02-17 Size : 36.93mb Publisher : 徐小文
[3G develop] turbo_code DL : 0: LTE system, OFDM modulation and Turbo Coding, including Viterbi, BCJR and SOVA are extensively analysed, ending up with a system performance specification. These are used to implement a fixed length Turbo encoder, a 16-QAM modulator and a 16 point IFFT on an FPGA using MATLAB Simulink⃝ R with Xilinx⃝ R System Generator plugin. A MATLAB⃝ R script is developed to test the Simulink implementation. In addition, an iterative Turbo decoder is programmed using MATLAB⃝ R .
Update : 2025-02-17 Size : 11kb Publisher : mezo
[Communication-Mobile] turbo_lte_ofdm_fpga_code DL : 0: LTE system, OFDM modulation and Turbo Coding, including Viterbi, BCJR and SOVA are extensively analysed, ending up with a system performance specification. These are used to implement a fixed length Turbo encoder, a 16-QAM modulator and a 16 point IFFT on an FPGA using MATLAB Simulink⃝ R with Xilinx⃝ R System Generator plugin. A MATLAB⃝ R script is developed to test the Simulink implementation. In addition, an iterative Turbo decoder is programmed using MATLAB⃝ R .
Update : 2025-02-17 Size : 11kb Publisher : mezo
[Communication-Mobile] finalTURBOCODE_OFDM DL : 0: Throughout the project the LTE system, OFDM modulation and Turbo Coding, including Viterbi, BCJR and SOVA are extensively analysed, ending up with a system performance specification. These are used to implement a fixed length Turbo encoder, a 16-QAM modulator and a 16 point IFFT on an FPGA using MATLAB Simulink R ⃝ with Xilinx R ⃝ System Generator plugin. A MATLAB R ⃝ script is developed to test the Simulink implementation. In addition, an iterative Turbo decoder is programmed using MATLAB R ⃝ .-Throughout the project the LTE system, OFDM modulation and Turbo Coding, including Viterbi, BCJR and SOVA are extensively analysed, ending up with a system performance specification. These are used to implement a fixed length Turbo encoder, a 16-QAM modulator and a 16 point IFFT on an FPGA using MATLAB Simulink R ⃝ with Xilinx R ⃝ System Generator plugin. A MATLAB R ⃝ script is developed to test the Simulink implementation. In addition, an iterative Turbo decoder is programmed using MATLAB R ⃝ .
Update : 2025-02-17 Size : 2mb Publisher : mezo
[Communication-Mobile] gsm_td_ops_1219_wdq DL : 0: 数字光纤直放站FPGA代码，同时支持GSM,TD-LTE双模(digital optical repeater FPGA coder ,support GSM and TD-LTE at the same time)
Update : 2025-02-17 Size : 72.68mb Publisher : wangdeq3000