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[SCMDDS

Description: 开发环境为Libero8.3,以DDS为基础设计了移频轨道信号发码器-Use Libero8.3 as the developing environment, designed a track signal frequency shift codec based on DDS
Platform: | Size: 4015104 | Author: Vicky Yang | Hits:

[VHDL-FPGA-VerilogLibero8.3

Description: 介绍了 Actel FPGA 的集成开发环境 IDE 的使用,从软件的安装和设置,以及 通过一个简单的例子说明如何使用 IDE中集成的第三方软件,如:Synplify、ModelSim等,可以帮助读者快速入门,缩短开发时间。-Actel FPGA introduced the use of IDE integrated development environment, from software installation and setup, as well as through a simple example of how to use the IDE, integrated third-party software, such as: Synplify, ModelSim, etc., can help readers get started quickly, shortening development time.
Platform: | Size: 2623488 | Author: anranxjk | Hits:

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