Description: 这是使用VERILOG语言,基于MICRON公司的SDRAM开发的SDRAM接口逻辑-verilog This is the use of language, MICRON-based company's development of the SDRAM SDRAM interface logic Platform: |
Size: 414928 |
Author:hanfei |
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Description: 这是使用VERILOG语言,基于MICRON公司的SDRAM开发的SDRAM接口逻辑-verilog This is the use of language, MICRON-based company's development of the SDRAM SDRAM interface logic Platform: |
Size: 414720 |
Author: |
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Description: The SDRAM controller is designed for the Virtex V300bg432-6. It s simulated
with Micron SDRAM models. The design is verified with timing constraints at
115 MHZ.-err Platform: |
Size: 2628608 |
Author:ronsullivan |
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Description: 使用Verilog控制美光CMOS图像处理器,并转存到SDRAM中。使用FPGA为QL的带fuse系列-Control the use of Verilog Micron CMOS image processor and SDRAM in转存到. FPGA for use with QL series fuse Platform: |
Size: 36864 |
Author:NOOW |
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Description: 这是xilinx应用指南xapp454的中文版本。本应用指南说明与 Micron DDR2 SDRAM 器件连接时,Spartan™ -3 器件中 DDR2 SDRAM 存储器接口的实现。本文档先简单介绍了 DDR2 SDRAM 器件的特性,然后对 DDR2 SDRAM 存储器接口的实现进行了详细说明。-This is the xilinx application note xapp454 the Chinese version. This application note and the Micron DDR2 SDRAM device is connected, Spartan ™ -3 devices DDR2 SDRAM memory interface implementation. This document briefly describes the DDR2 SDRAM device features, and then the realization of DDR2 SDRAM memory interface is described in detail. Platform: |
Size: 217088 |
Author:陈阳 |
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Description: SDRAM 控制器的 verilog 源代码, 针对Micron 的SDRAMS设计,支持全部的指令, 已经经过逻辑验证,并实际用在芯片设计中,作为一个模块,正常工作.-SDRAM controller verilog source code, for Micron' s SDRAMS designed to support all of the instructions, the logic has been verified, and actually used in chip design, as a module to work. Platform: |
Size: 9216 |
Author:Jerd Hu |
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Description: micron各种规格的SDRAM的仿真模型及详细设计资料,基于verilog语言。-micron variety of SDRAM simulation model and detailed design information, based on the verilog language. Platform: |
Size: 64512 |
Author:李志 |
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Description: SDRAM 控制器 ,Verilog版本的,带有完整的SDRAM 仿真模型,testbench等,能够实际使用,并且利于学习-The SDRAM controller is designed for the Virtex V300bg432-6. It s simulated with Micron SDRAM models. The design is verified with backannotated simulation at 125MHz Platform: |
Size: 309248 |
Author:严刚 |
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Description: 美光 ddr sdram 仿真模型,
不可综合,用在测试平台模仿ddr sdram的功能。verilog语言编写。-Micron MOBILE DDR SDRAM simulation model.
not synthesisable, used in tesetbench to emulation the function of ddr sdram.
written in verilog Platform: |
Size: 39936 |
Author:qiubin |
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