Description: 一般情况下，一元多项式的表示及相加减，可以用顺序存储结构，使得多项式相加减的算法定义十分简单。然而，在通常的应用中，多项式的次数可能很高且变化很大，使得顺序存储结构的最大长度很难确定。特别是在处理形如 的多项式时，就要用一长度为20001的线性表来表示，表中仅有3个非零元素，这种对内存空间的使用是很浪费的。为避免出现这种情况，本程序采用了链式存储结构，使得在进行诸如 运算时更节省内存空间。-Under normal circumstances, one of the polynomial expression and phase addition and subtraction can be used to sequence storage structure, making addition and subtraction of polynomial-phase algorithm is very simple definition. However, in the usual applications, the number of polynomials can be very high and a lot of changes which makes the order of storage structure it is difficult to determine the maximum length. Especially in the treatment of polynomial-shaped, such as when, it is necessary to use one length of 20,001 linear table, said table with only three non-zero elements, this use of memory space is wasted. To avoid this situation, the procedure uses the structure of chain stores, making more computing course such as saving memory space. Platform: |
Size: 2048 |
Author:彭枝考 |
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Description: ADS中实现记忆多项式模型，参照此模型，其他模型很容易实现-ADS achieve memory polynomial model, in the light of this model, other models can easily achieve Platform: |
Size: 651264 |
Author:任逍遥 |
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Description: 一、问题描述：将多个多项式输入并存储在内存中，然后对多项式进行加，减，乘等基本运算。
二、实行数据方法：用单链表来储存多项式，每个节点存储一项-First, the problem Description: The number of polynomial input and stored in memory, and then make additions to the polynomial, subtraction, multiplication and other basic computing. Second, the implementation of data Methods: Single-Linked List to store polynomials, each node storing a Platform: |
Size: 134144 |
Author:风过柳影 |
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Description: 一、问题描述：将多个多项式输入并存储在内存中，然后对多项式进行加，减，乘等基本运算。
二、实行数据方法：用单链表来储存多项式，每个节点存储一项-First, the problem Description: The number of polynomial input and stored in memory, and then make additions to the polynomial, subtraction, multiplication and other basic computing. Second, the implementation of data Methods: Single-Linked List to store polynomials, each node storing a Platform: |
Size: 369664 |
Author:风过柳影 |
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Description: for：
Root of a Polynomial
--- --- --- --- --
Time Limit: 1 Second Memory Limit: 32768 KB
--------------------------------------------------------------------------------
A polynomial of degree n has the common form as . Your task is to write a function to find a root of a given polynomial in a given interval.
Format of function
double Polynomial_Root(int n, double c[], double a, double b, double EPS)
where int n is the degree of the polynomial double c[] is an array of n +1 coefficients , , ..., , and of the given polynomial double a and b are the two end-points of the given interval and double EPS is the accuracy of the root.
The function must return the root.
Note: It is guaranteed that a unique real number r exists in the given interval such that p(r) = 0. -for: Root of a Polynomial---------------------- Time Limit: 1 Second Memory Limit: 32768 KB-------------------------------------------------------------------------------- A polynomial of degree n has the common form as. Your task is to write a function to find a root of a given polynomial in a given interval. Format of functiondouble Polynomial_Root (int n, double c [], double a, double b, double EPS) where int n is the degree of the polynomial double c [] is an array of n+ 1 coefficients,, ..., , and of the given polynomial double a and b are the two end-points of the given interval and double EPS is the accuracy of the root.The function must return the root.Note: It is guaranteed that a unique real number r exists in the given interval such that p (r) = 0. Platform: |
Size: 1024 |
Author:Alex Zhang |
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Description: CRC采用比特型算法，生成多项式为CCITT 0x1021，无需查表，节省内存空间。-CRC-bit-based algorithm used to generate a polynomial for the CCITT 0x1021, no look-up table to save memory space. Platform: |
Size: 222208 |
Author:张键 |
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Description: this very useful file that simulate the memory polynomial method.-this is very useful file that simulate the memory polynomial method. Platform: |
Size: 1024 |
Author:pouria |
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Description: Digital Predistortion of Nonlieaner RF Power Amplifier with Memory Effects.
This M code simulates a DPD technique linearization for a AB-class nonlinear HPA with memory effects. Here we consider a memory polynomial predistorter to modeling nonlinearity characteristics and memory effects of a HPA.Simulation procedures divided into three separate parts:
1)Analog imperfection compensation for the direct upconversion transmitter
2)Design a DPD based on a memory polynomial predistorter
3)Performance evaluation via a number of parameters such as:EVM,PSD,SNR,
-Digital Predistortion of Nonlieaner RF Power Amplifier with Memory Effects.
This M code simulates a DPD technique linearization for a AB-class nonlinear HPA with memory effects. Here we consider a memory polynomial predistorter to modeling nonlinearity characteristics and memory effects of a HPA.Simulation procedures divided into three separate parts:
1)Analog imperfection compensation for the direct upconversion transmitter
2)Design a DPD based on a memory polynomial predistorter
3)Performance evaluation via a number of parameters such as:EVM,PSD,SNR,
Platform: |
Size: 37888 |
Author:shahram |
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Description: Digital Predistortion of Nonlieaner RF Power Amplifier with Memory Effects.
This M code simulates a DPD technique linearization for a AB-class nonlinear HPA with memory effects. Here we consider a memory polynomial predistorter to modeling nonlinearity characteristics and memory effects of a HPA.Simulation procedures divided into three separate parts:
1)Analog imperfection compensation for the direct upconversion transmitter
2)Design a DPD based on a memory polynomial predistorter
3)Performance evaluation via a number of parameters such as:EVM,PSD,SNR,
-Digital Predistortion of Nonlieaner RF Power Amplifier with Memory Effects.
This M code simulates a DPD technique linearization for a AB-class nonlinear HPA with memory effects. Here we consider a memory polynomial predistorter to modeling nonlinearity characteristics and memory effects of a HPA.Simulation procedures divided into three separate parts:
1)Analog imperfection compensation for the direct upconversion transmitter
2)Design a DPD based on a memory polynomial predistorter
3)Performance evaluation via a number of parameters such as:EVM,PSD,SNR,
Platform: |
Size: 19976192 |
Author:shahram |
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Description: 记忆多项式数字预失真，能够完成功率放大器的预失真，效果良好。-Memory polynomial predistortion, to complete the pre-distortion power amplifier with good results Platform: |
Size: 2048 |
Author:曲乔 |
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Description: 功率放大器的Wiener Hammerstein建模及记忆多项式模型-Modeling PA with Wiener Hammerstein and Memory Polynomial Method Platform: |
Size: 3072 |
Author:张帆 |
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Description: 用MACD 指令完成多项式的求和。系数放在程序存储器，变量放在数据存储器。Polynomial with the MACD instruction to complete the sum. Coefficients in program memory, variable on the data memory.-Polynomial with the MACD instruction to complete the sum. Coefficients in program memory, variable on the data memory. Platform: |
Size: 4096 |
Author:王高伟 |
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Description: 用MACD 指令完成多项式的求和。系数放在程序存储器，变量放在数据存储器。Polynomial with the MACD instruction to complete the sum. Coefficients in program memory, variable on the data memory.-Polynomial with the MACD instruction to complete the sum. Coefficients in program memory, variable on the data memory. Platform: |
Size: 4096 |
Author:ainly |
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Description: Power amplifier is essential component in
communication systems and it’s inherently nonlinear. This essay
mainly investigate a based on Hammerstein predistorter , a
memory polynomial predistorter. The Hammerstein predistorter
is designed specifically for power amplifiers that can be modeled
as a Wiener system. The memory polynomial predistorter can
correct both the nonlinear distortions and the linear frequency
response that may exist in the power amplifier. Platform: |
Size: 167936 |
Author:sali |
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Description: 关于预失真系统的一些参考文档：
A Band-Divided Memory Polynomial for Wideband Digital Predistortion With Limited Bandwidth Feedback
A Digital Predistortion System With Extended Correction Bandwidth With Application to LTE-A Nonlinear Power Amplifiers
A 25 dBm Digitally Modulated CMOS Power Amplifier for WCDMA EDGE OFDM With Adaptive Digital Predistortion and Efficient Power Control
2012-On the Robustness of Look-Up Table Digital Predistortion in the Presence of Loop Delay Error
2012-Complex-Chebyshev Functional Link Neural Network Behavioral Model for Broadband Wireless Power Amplifiers-DPD reference paper Platform: |
Size: 8524800 |
Author:wangmo |
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Search - Memory Polynomial