Description: 这是mentor公司modelsim软件的高级调试技巧培训。对于从事可编程逻辑系统开发的工程师们，这是非常必要掌握的知识。-modelsim software company's senior debugging skills training. Having engaged in the development of programmable logic system engineers, it is necessary to grasp knowledge. Platform: |
Size: 3009045 |
Author:王宇 |
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Description: 这是mentor公司modelsim软件的高级调试技巧培训。对于从事可编程逻辑系统开发的工程师们，这是非常必要掌握的知识。-modelsim software company's senior debugging skills training. Having engaged in the development of programmable logic system engineers, it is necessary to grasp knowledge. Platform: |
Size: 3008512 |
Author:王宇 |
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Description: modelsim的一些问题集锦，对于从事FPGA的研发人员很有帮助-Collection of some of the problems modelsim for personnel engaged in R & D FPGA helpful Platform: |
Size: 779264 |
Author:fu |
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Description: i2cinterface.v是我自己写的一段verilog代码，在接口为I2C接口的芯片设计中用到。送去流过片，仅作参考用。
debussy和modelsim协同仿真.txt 用于debussy和modelsim协同仿真时参考
RTL Coding and Optimization Guide for use with Design Compiler.pdf
数提讲座（1）.wmv
数提讲座（2）.wmv这两个视频和一篇文档对数字IC前端设计师的设计提高很有帮助，如果你觉得你到瓶颈状态了，想提高的话，强烈建议好好看看。
ADVANCED ASIC CHIP SYNTHESIS中文翻译资料.ppt这也是我极力推荐的，相信学习dc的人都知道原英文文档。这个ppt相当于翻译版，对dc和pt中文详细阐述。
基于DDR SDRAM控制时序分析的模型.pdf
全定制单元时序模型的建立.pdf 这两篇文档是用作建议时序模型的时候用作参考，是我花了小money买的哦。
数字IC设计全程实例.pdf 本文介绍了基于标准单元库的深亚微米数字集成电路的自动化设计流程。此流程从设计的系统行为级描述或RTL 级描述开始，依次通过系统行为级的功能验证，设计综合，综合后仿真，自动化布局布线，到最后的版图后仿真.
-i2cinterface.v a section of my own writing verilog code for the I2C interface in the interface used in chip design. Sent to flow through the film, only for reference.
debussy and modelsim co-simulation. txt for debussy and modelsim co-simulation reference
RTL Coding and Optimization Guide for use with Design Compiler.pdf
Mention the number of lectures (1). Wmv
Mention the number of lectures (2). Wmv the two videos, and the document is useful for the digital front-end IC designers to improve the design capability. if you think you go to bottleneck, and want to improve, then it is strongly recommended a good look.
ADVANCED ASIC CHIP SYNTHESIS Chinese translation of the information. Ppt that is what I strongly recommend, I believe that everyone learning dc knows its original English document. This ppt is equivalent to its translations.It elaborates the dc and pt in Chinese .
DDR SDRAM control the timing analysis based on the model. Pdf
Platform: |
Size: 20989952 |
Author:喻琪 |
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Description: FPGA开发仿真工具modelsim的高级进阶教程，包括如何写脚本文件和后台批处理文件-FPGA Development Advanced simulation tools modelsim tutorial, including how to write a script file and back-office batch file Platform: |
Size: 399360 |
Author:苏阳 |
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