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[Embeded-SCM Develop] NIOSIIFLASHStep_by_step DL : 0: 将NiosII程序下载到Flash的方法（Step_by_step）.pdf-NiosII procedures will be downloaded to the Flash (Step_by_step). P df
Update : 2008-10-13 Size : 187.27kb Publisher : 高
[Other resource] leon3-altera-ep2s60-ddr DL : 0: This leon3 design is tailored to the Altera NiosII Startix2 Development board, with 16-bit DDR SDRAM and 2 Mbyte of SSRAM. As of this time, the DDR interface only works up to 120 MHz. At 130, DDR data can be read but not written. NOTE: the test bench cannot be simulated with DDR enabled because the Altera pads do not have the correct delay models. * How to program the flash prom with a FPGA programming file 1. Create a hex file of the programming file with Quartus. 2. Convert it to srecord and adjust the load address: objcopy --adjust-vma=0x800000 output_file.hexout -O srec fpga.srec 3. Program the flash memory using grmon: flash erase 0x800000 0xb00000 flash load fpga.srec
Update : 2008-10-13 Size : 112.09kb Publisher : king.xia
[Embeded-SCM Develop] NiosII DL : 1: NiosII的范例，包含Alarm、DMA、Fine-gained Flash Access驱动、HighResTimer、ISR、Simple Flash Access驱动、利用重载技巧实现最小代码尺寸、字符模式设备7个范例，并有测试结果
Update : 2008-10-13 Size : 10.7kb Publisher : dq
[Embeded-SCM Develop] NIOS-Flash DL : 0: NiosII的Flash编程指南（www.sopc.net.cn）
Update : 2008-10-13 Size : 4.72mb Publisher : 齐晶
[Embeded-SCM Develop] NIOSIIFLASHStep_by_step DL : 0: 将NiosII程序下载到Flash的方法（Step_by_step）.pdf-NiosII procedures will be downloaded to the Flash (Step_by_step). P df
Update : 2025-02-17 Size : 187kb Publisher : 高
[VHDL-FPGA-Verilog] leon3-altera-ep2s60-ddr DL : 0: This leon3 design is tailored to the Altera NiosII Startix2 Development board, with 16-bit DDR SDRAM and 2 Mbyte of SSRAM. As of this time, the DDR interface only works up to 120 MHz. At 130, DDR data can be read but not written. NOTE: the test bench cannot be simulated with DDR enabled because the Altera pads do not have the correct delay models. * How to program the flash prom with a FPGA programming file 1. Create a hex file of the programming file with Quartus. 2. Convert it to srecord and adjust the load address: objcopy --adjust-vma=0x800000 output_file.hexout -O srec fpga.srec 3. Program the flash memory using grmon: flash erase 0x800000 0xb00000 flash load fpga.srec-This leon3 design is tailored to the Altera NiosII Startix2 Development board, with 16-bit DDR SDRAM and 2 Mbyte of SSRAM. As of this time, the DDR interface only works up to 120 MHz. At 130, DDR data can be read but not written. NOTE: the test bench cannot be simulated with DDR enabled because the Altera pads do not have the correct delay models. * How to program the flash prom with a FPGA programming file 1. Create a hex file of the programming file with Quartus. 2. Convert it to srecord and adjust the load address: objcopy--adjust-vma=0x800000 output_file.hexout-O srec fpga.srec 3. Program the flash memory using grmon: flash erase 0x800000 0xb00000 flash load fpga.srec
Update : 2025-02-17 Size : 112kb Publisher :
[Embeded-SCM Develop] falsh DL : 0: flash芯片的驱动，在NiosII里运用，在NiosII IDE里进行编译-flash chip drivers, in NiosII in use, carried out in NiosII IDE compiler
Update : 2025-02-17 Size : 2kb Publisher : 韩启祥
[Embeded-SCM Develop] CF_NiosII5.0 DL : 0: Compact Flash Support For Nios II 5.0, To download supporting materials for this new Compact Flash support, download the following .zip file, extract to a computer with Quartus II 5.0 & Nios II 5.0 installed, and proceed to use the hardware and/or software examples of your choice to proceed. Additional information is available in the readme.txt document, included in the top-level of the .zip file
Update : 2025-02-17 Size : 1.52mb Publisher : Robert
[Embeded-SCM Develop] NiosII DL : 0: NiosII的范例，包含Alarm、DMA、Fine-gained Flash Access驱动、HighResTimer、ISR、Simple Flash Access驱动、利用重载技巧实现最小代码尺寸、字符模式设备7个范例，并有测试结果-NiosII example, contains Alarm, DMA, Fine-gained Flash Access driver, HighResTimer, ISR, Simple Flash Access drive, use heavy-duty techniques to achieve the smallest code size, character-mode device 7 sample, and test results
Update : 2025-02-17 Size : 10kb Publisher : dq
[Embeded-SCM Develop] NIOS-Flash DL : 0: NiosII的Flash编程指南（www.sopc.net.cn）-NiosII the Flash Programming Guide (www.sopc.net.cn)
Update : 2025-02-17 Size : 4.72mb Publisher : 齐晶
[Other Embeded program] NiosII_example DL : 0: include:alarm, DMA, fine_gainde flash, HighResTime,ISR,Simple flash,and so on-include: alarm, DMA, fine_gainde flash, HighResTime, ISR, Simple flash, and so on
Update : 2025-02-17 Size : 8kb Publisher : tuya
[VHDL-FPGA-Verilog] DEMO1_KEY_LED DL : 0: KX_DVP3F型FPGA应用板/开发板（全套）包括：  CycloneII系列FPGA EP2C8Q208C8 40万们，含20M-270MHz锁相环2个。  RS232串行接口；VGA视频口  高速SRAM 512KB。可用于语音处理，NiosII运行等。  配置Flash EPCS2， 10万次烧写周期。  isp单片机T89S8253：MCS51兼容单片机，12KB在系统可编程Flash ROM，10万次烧写周期；2KB在系统可编程EEPROM，10万次烧写周期；2.7V-5.5V工作电压；0-24MHz 工作时钟；  2数码管显示器、20MHz时钟源（可通过FPGA中的锁相环倍频）；  液晶显示屏（20字X4行）；  工作电源5V、3.3V、1.2V混合电压源，良好电磁兼容性主板。  配套示例程序、资料、编程软件光盘等。  4X4键盘，4普通按键，8可锁按键，8发光管  BlasterMV编程下载器和并口通信线，可完成FPGA编程下载和isp单片机的编程。KX_DV3F开发板的源程序-err
Update : 2025-02-17 Size : 352kb Publisher : ldg
[VHDL-FPGA-Verilog] NIOSII_tutorial_code DL : 0: NIOSII实例代码。包括系统时钟代码，DMA(Memory to Memory)驱动代码，Fine-gained Flash Access驱动代码,Timestamp驱动代码,ISR代码，Simple Flash Access驱动代码，UART代码-NIOSII examples of code. Including the system clock source, DMA (Memory to Memory) drive code, Fine-gained Flash Access driver code, Timestamp-driven code, ISR code, Simple Flash Access driver code, UART code
Update : 2025-02-17 Size : 8kb Publisher : danielmu
[ARM-PowerPC-ColdFire-MIPS] niossramflash DL : 0: 在altera FPGA ep3c25器件上实现niosii+sram+flash-Altera FPGA ep3c25 in devices to achieve niosii+ sram+ flash
Update : 2025-02-17 Size : 16.98mb Publisher : billfeng
[Embeded-SCM Develop] NiosII_CN DL : 0: niosII学习教程，flash版。适合初学者了解niosII的基本知识-niosII learning tutorial, flash version. Suitable for beginners to understand the basics of niosII
Update : 2025-02-17 Size : 58.68mb Publisher : 刘非
[VHDL-FPGA-Verilog] EP2C8_SDRAM_FLASH DL : 0: NIOSII FLASH设置程序范例，sopc应用-NIOSII FLASH setup example, sopc application
Update : 2025-02-17 Size : 6.07mb Publisher : liming
[Embeded-SCM Develop] NiosII-example DL : 0: 众多nios内核软件实例，包括Alarm范例、DMA范例、ISR范例、字符模式设备范例、Simple Flash范例-Nios core software of many examples, including the Alarm example, DMA example, ISR example, character-mode device example, Simple Flash Examples, etc.
Update : 2025-02-17 Size : 8kb Publisher : 杨明辉
[VHDL-FPGA-Verilog] NiosII DL : 0: FPGA NiosII 相关例程，Flash方面的和实验的几个例程，学习FPGA NIOSII 感兴趣的赶紧下载吧，编译通过，直接能用。-FPGA NiosII related routines, Flash and experimental aspects of several routines, learning FPGA NIOSII interested in quickly download it, compile, can be used directly.
Update : 2025-02-17 Size : 13.26mb Publisher : xhl
[VHDL-FPGA-Verilog] Flash DL : 0: QuartusII NiosII 怎样通过FLASH方式下载程序-How to download programs through the FLASH mode
Update : 2025-02-17 Size : 8.11mb Publisher : 张晓瑞
[Software Engineering] Flash-use-in-NiosII DL : 0: nios II中的flash使用，供大家参考学习。-flash use in nios II，For your reference.
Update : 2025-02-17 Size : 597kb Publisher : 刘欣

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