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[Embeded-SCM Develop] Binary_VGA_Controller

Description: VGA的IP核，可直接用于nios II的应用里，在DE2板子直接使用
Platform: | Size: 79747 | Author: 沈克镇 | Hits:

[ARM-PowerPC-ColdFire-MIPS] NiosII处理器中文小册子

Description: 少有的niosii中文资料,对系统开发很有帮助的-rare niosii Chinese data, the system will help to develop
Platform: | Size: 3229696 | Author: guo | Hits:

[Other Embeded program] NIOS_HOST_MOUSE_VGA

Description: Nios系统, 加入了VGA控制器和USB鼠标控制器-Nios system, add a VGA controller and the USB mouse controller
Platform: | Size: 909312 | Author: | Hits:

[VHDL-FPGA-Verilog] lcd_test

Description: NIOS II IDE 编程， LCD测试程序，仅供参考。-NIOS II programming IDE, LCD testing procedures, for information purposes only.
Platform: | Size: 397312 | Author: 张建 | Hits:

[VHDL-FPGA-Verilog] VGA_control_verilogHDL

Description: 基于FPGA的VGA控制器设计。对外支持普通VGA接口，以600×480的分辨率和60Hz扫描率为例。对内支持NIOSII软核接口。-FPGA-based VGA controller design. External support ordinary VGA interface, to 600 × 480 resolution and scan rate of 60Hz as an example. Internal support NIOSII soft-core interface.
Platform: | Size: 288768 | Author: Ray ZH | Hits:

[Embeded-SCM Develop] VGAControllercomponent

Description: altera的ip核，在sopcbuilder中添加后，在niosII IDE中可以轻松控制vga的显示，十分难得哦！-altera
Platform: | Size: 23552 | Author: 朱峰 | Hits:

[Embeded-SCM Develop] Binary_VGA_Controller

Description: VGA的IP核，可直接用于nios II的应用里，在DE2板子直接使用-VGA s IP core, can be used directly in nios II applications, the direct use in the DE2 board
Platform: | Size: 79872 | Author: 沈克镇 | Hits:

[Other] NIOS2full

Description: nios ii 完整版教程，学习fpga，实现32位处理器的嵌入式系统-nios ii full version of tutorial, learning fpga, realize 32-bit processors, embedded systems
Platform: | Size: 1745920 | Author: wuchangyu | Hits:

[VHDL-FPGA-Verilog] VGA_Ctrl

Description: 基于NIOS II 的DE1开发板的VGA 控制器VGA控制模块主要控制VGA模块的开始和其运行的状态，需要写一个Avalon 从端口响应CPU的控制信号，继而控制整个模块的运行，-Based on the DE1 of the NIOS II development board VGA controller to control the VGA module VGA main control module and its operation began, and the need to write a response to Avalon from the CPU ports of the control signal, and then control the operation of the entire module,
Platform: | Size: 1024 | Author: 黄涛 | Hits:

[Other] readSDkard

Description: 读SD卡，主要涉及SOPC技术，NIOS软核编程，供学习参考用-Reading SD card, mainly related to SOPC technology, NIOS soft-core programming for the study and reference
Platform: | Size: 14336 | Author: lgl | Hits:

[Home Personal application] niosVGA

Description:
Platform: | Size: 708608 | Author: bhahn | Hits:

[VHDL-FPGA-Verilog] DE0_D5M

Description: 这是在DE0板上实现的用D5M+VGA的图像实时显示程序，完整工程-This is achieved in DE0 board D5M+ VGA images with real-time display program, complete project
Platform: | Size: 1246208 | Author: | Hits:

[VHDL-FPGA-Verilog] PaintBrush

Description: To use the device port ISP1362 and NIOS II CPU for mouse movement detection and the VGA interface and implement a Paint Brush Application[1] using Cyclone II FPGA on the Altera DE2 board.
Platform: | Size: 16016384 | Author: Dang Tien Dat | Hits:

[VHDL-FPGA-Verilog] VGA_CCD531

Description: 本文围绕一个包含Nios II软核处理器的可编程片上系统展开数码相机的样机设计。论文首先对样机所要达到的整体功能进行了规划，接下来并行开展了软硬件设计。在硬件方面，充分利用了所使用平台提供的SD卡插槽、键盘、数码管、SRAM等各种硬件资源，并用Verilog HDL硬件描述语言设计了样机系统所需要的VGA接口控制器、CMOS图像传感器接口控制器以及VGA显示存储器；在软件方面，本文基于Nios II软核处理器用C语言实现了SD卡的驱动、FAT文件系统的移植、VGA显视器的驱动以及BMP图片文件的转换与显示等功能，并能通过键盘操作和用户界面控制样机拍照和相片浏览。实验结果表明本样机系统设计正确，软硬件各模块绝大部分工作正常，为进一步研究数码相机的应用建立起了一个实用平台。-This paper focuses on a Nios II soft core processors, programmable on-chip system to launch a digital camera prototype design. Firstly, the overall function of the prototype to be achieved by planning, then in parallel hardware and software design. Take full advantage of the hardware side, using the platform provided by the SD card slot, keyboard, digital tube, SRAM and other hardware resources, and using Verilog HDL hardware description language to design a prototype system VGA interface controller, CMOS image sensors interface controller and the VGA display memory the software side, based on the Nios II soft core processor implemented in C, the SD card driver, and the transplantation of the FAT file system, the VGA display driver, and BMP image file conversion and display function, and through the keyboard and user interface control prototype photographs and photo browsing. The experimental results show that this prototype system is designed properly, most of the hardware and softwa
Platform: | Size: 15078400 | Author: | Hits:

[VHDL-FPGA-Verilog] DE2_NIOS_HOST_MOUSE_VGA

Description: 该设计使用了Nios II系统来演示如何在DE2开发板上的USB主机端口连接到一个USB设备进行通信。本设计实现了一个单色显示屏，预加载的图像，用户可以利用它与鼠标。应连接到VGA端口，一个USB鼠标连接到USB主机端口和一个CRT/ LCD显示器。-This designs uses a Nios II system to demonstrate how to communicate with a USB device connected to the USB HOST port on the DE2 board. This design implements a monochrome display, with a preloaded image, where the user can draw on it with a mouse. A USB mouse should be connected to the USB HOST port and a CRT/LCD monitor should be connected to the VGA port.
Platform: | Size: 6074368 | Author: 黯魂天残 | Hits:

[LabView] VGA

Description: VGA video controller for the Altera Nios II Processor v4.0                
Platform: | Size: 310272 | Author: DDD | Hits:

[VHDL-FPGA-Verilog] DE2_NIOS_HOST_MOUSE_VGA

Description: 本代码为DE2开发板例程源码（EP2C35F672C6），项目基于quartus II 9.0（随板光盘为7.2版本以下，在9.0版以上编译会报错）。本项目实现一个USB画笔功能，通过FPGA控制USB口，USB口接上鼠标，通过XGA口外界显示设备，实现显示设备对鼠标移动轨迹的显示。-In this demonstration, we implement a Paintbrush application by using a USB mouse as the input device.This demonstration uses the device port of the Philips ISP1362 chip and the Nios II processor to implement a USB mouse movement detector. We also implemented a video frame buffer with a VGA controller to perform the real-time image storage and display.
Platform: | Size: 2547712 | Author: chenxin | Hits:

[VHDL-FPGA-Verilog] NIOSII_VGA_Controller

Description: Nios II VGA Controller with DMA The Nios II VGA Controller with DMA is an SOPC Builder component which can be added to any SOPC Builder system to provide VGA display capability. The controller is capable of displaying the following resolutions: • 640 x 480 • 800 x 600 • 1024 x 768 All resolutions can be displayed in either 16 or 24-bit color. Resolution and color depth settings are configurable in the VGA Controller configuration wizard in SOPC Builder. The controller was designed for use with the Lancelot daughter card, available Microtronix. The Lancelot card features a Texas Instruments THS8134 video digital to analog converter (DAC) with a VGA output connector, allowing display to a VGA monitor. Also on the card are two PS2 connectors and a 1/8”audio jack. The Lancelot card attaches to the prototype headers of Nios II development boards allowing it to be driven by FPGA pins. -Nios II VGA Controller with DMA The Nios II VGA Controller with DMA is an SOPC Builder component which can be added to any SOPC Builder system to provide VGA display capability. The controller is capable of displaying the following resolutions: • 640 x 480 • 800 x 600 • 1024 x 768 All resolutions can be displayed in either 16 or 24-bit color. Resolution and color depth settings are configurable in the VGA Controller configuration wizard in SOPC Builder. The controller was designed for use with the Lancelot daughter card, available Microtronix. The Lancelot card features a Texas Instruments THS8134 video digital to analog converter (DAC) with a VGA output connector, allowing display to a VGA monitor. Also on the card are two PS2 connectors and a 1/8”audio jack. The Lancelot card attaches to the prototype headers of Nios II development boards allowing it to be driven by FPGA pins.
Platform: | Size: 59392 | Author: Mr | Hits:

[VHDL-FPGA-Verilog] vga_test

Description: 基于nios的vga控制器,分辨率及显示区域,显示位数,显存深度可调整,已经在altera cyclone ii条件下测试通过 quartus13.0开发环境 主机端符合avalon标准-VGA controller based on NIOS, resolution and display area show the median, the memory depth can be adjusted, has been in Altera cyclone II under the condition of test through the end of the quartus13.0 development environment of the host with Avalon standard
Platform: | Size: 7123968 | Author: 周杰伦 | Hits:

[VHDL-FPGA-Verilog] chu_avalon_vga_de2

Description: Embedded SoPC Design with Nios II Processor and VHDL Examples-VGA
Platform: | Size: 6144 | Author: davido | Hits:

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