Search - OR1200

Search - OR1200 - List

[Other resource] or2000 DL : 0: 这是一个MIPS架构的开发的CPU软核OR2000，比OR1200更高的版本，里面还有SOC程序，多次MPW流片成功
Update : 2008-10-13 Size : 100.73kb Publisher : liming
[Other resource] or1200 DL : 1: or1200的内核以及一些参考文献，是Verilog的RTL级描述。
Update : 2008-10-13 Size : 1.91mb Publisher : sophia
[VHDL-FPGA-Verilog] OpenRISC DL : 0: 一个开放的risc，已应用到实际中，可以借鉴的不少，大家-an open RISC, has been applied to practice, we can draw a lot, we look at
Update : 2025-02-17 Size : 2.47mb Publisher : 12
[ARM-PowerPC-ColdFire-MIPS] mips_creative DL : 0: 一个完整的MIPS CPU，创新设计，浙江大学某学生作品，有完整的说明文档、仿真文件和测试文件，可以直接综合和仿真。-a complete MIPS CPU, innovative design, a student of Zhejiang University works with complete documentation, simulation and test documents, and can be directly integrated simulation.
Update : 2025-02-17 Size : 1.78mb Publisher : 梁文锋
[ARM-PowerPC-ColdFire-MIPS] or2000 DL : 0: 这是一个MIPS架构的开发的CPU软核OR2000，比OR1200更高的版本，里面还有SOC程序，多次MPW流片成功-This is a MIPS architecture to develop the CPU soft-core OR2000, higher than OR1200 version, there is also SOC procedures, many times MPW silicon success
Update : 2025-02-17 Size : 100kb Publisher : liming
[Other Embeded program] or1200 DL : 0: or1200的内核以及一些参考文献，是Verilog的RTL级描述。-or1200 core as well as some references, is the RTL-level Verilog description.
Update : 2025-02-17 Size : 1.91mb Publisher :
[VHDL-FPGA-Verilog] OR1200_verilog DL : 0: or1200开源risc cpu的verilog描述实现，cpu源代码分析与芯片设计一书的源码-or1200 open source Verilog description of the risc cpu realize, cpu source code analysis and chip design source book
Update : 2025-02-17 Size : 200kb Publisher : yu
[Com Port] mini_or1200 DL : 0: openrisc mini_or1200, 包括 or1200、uart16550、dbg_interface、mem_if(片上内存)这几部分。-openrisc mini_or1200, including or1200, uart16550, dbg_interface, mem_if (memory chip) in these parts.
Update : 2025-02-17 Size : 822kb Publisher : billfeng
[Embeded-SCM Develop] or1200_alu DL : 0: 该代码为OR1200 CPU中ALU部件，在ISE中综合成功，希望能为对HDL感兴趣的朋友提供帮助。-The code for the OR1200 CPU in ALU components in a comprehensive success in the ISE, hoping to interest in HDL as a friend to help.
Update : 2025-02-17 Size : 4kb Publisher : vela
[VHDL-FPGA-Verilog] OR1200 DL : 0: 用verilog编写的cpu，有点难度，大家慢慢看吧-Using verilog written cpu, a bit more difficult, we take your time
Update : 2025-02-17 Size : 111kb Publisher : kenshin
[MiddleWare] or1200_rtl_verilog DL : 0: openverilog 的or1200开源代码-openverilog or1200
Update : 2025-02-17 Size : 209kb Publisher : spy
[VHDL-FPGA-Verilog] openriscir1200 DL : 0: openrisc or1200全部的源代码-openrisc or1200 daima
Update : 2025-02-17 Size : 205kb Publisher : wuzhantuo
[VHDL-FPGA-Verilog] I2C_controller_core DL : 0: or1200 i2c controller core-i2c controller core
Update : 2025-02-17 Size : 1.42mb Publisher : sun
[VHDL-FPGA-Verilog] IrDA DL : 0: or1200 IrDA core code -or1200 IrDA core
Update : 2025-02-17 Size : 566kb Publisher : sun
[VHDL-FPGA-Verilog] PS2_Core DL : 0: or1200 PS2_Core code
Update : 2025-02-17 Size : 21kb Publisher : sun
[VHDL-FPGA-Verilog] spigpio DL : 0: or1200 spigpio core code
Update : 2025-02-17 Size : 2kb Publisher : sun
[VHDL-FPGA-Verilog] Manchester_Decoder_for_Wireless DL : 0: or1200 Manchester_Decoder_for_Wireless core code
Update : 2025-02-17 Size : 27kb Publisher : sun
[Com Port] or1200_uart DL : 0: OR1200最小系统，包括软核处理器OR1200，内存，总线，GPIO及UART的RTL实现。在SOPC2000硬件平台上实现。软件开发环境为Ubuntu，能实现SOPC2000和PC机的简单串口通信。-OR1200 minimum system, including soft-core processor OR1200, memory, bus, GPIO and UART of the RTL implementation. In SOPC2000 hardware platform. Software development environment for Ubuntu, PC, to achieve SOPC2000 and simple serial communication.
Update : 2025-02-17 Size : 7.72mb Publisher : 陶宇
[VHDL-FPGA-Verilog] or1200 DL : 1: 片上系统设计思想与源代码分析光盘；片上系统设计思想与源代码分析光盘-SOC design source for or1200
Update : 2025-02-17 Size : 4.12mb Publisher : liyy
[VHDL-FPGA-Verilog] OR1200-Voice DL : 0: 基于EP3C开发板的采用OR1200 CPU的语音回放系统-Voice playback system based on OR1200
Update : 2025-02-17 Size : 640kb Publisher : horacedu

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