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Description: Xilinx公司pc_cfr IP核的MatLab仿真-matlab simulation model of pc_cfr ip core of xilinx
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Author: philoman |
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Description: 采用matlab simulink编写的消峰参考设计,可以直接生成verilog代码。消峰主要用于降低无线信号的峰均比,提高功放效率。-Clipping prepared using matlab simulink reference design, you can generate verilog code directly. Consumers peak mainly used to reduce radio signal PAR, improve power amplifier efficiency.
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Size: 2606080 |
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