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Description: PCI32 is just a port of my 16-bit DOS program PCI to \"true\" win32 - that is, functionality under the 32-bit x86 builds of Windows NT 4.0, 2000, XP, 2003, Longhorn/Vista and so on. This program will NOT work under DOS/WIN9x/ME/OS2/Linux etc, or any 64-bit OS-PCI32 is just a port of my 16-bit DOS program PCI to "true" win32 - that is, functionality under the 32-bit x86 builds of Wi Windows NT 4.0, 2000, XP, 2003, Longhorn / Vista and so on. This program will NOT work under DOS/WIN9x/ME/OS2/Linux etc, or any 64-bit OS!
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Size: 250943 |
Author: lzq |
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Description: PCI设计指南The Xilinx LogiCORE PCI interface is a fully verified, pre-implemented
PCI Bus interface. This interface is available in 32-bit and 64-
bit versions, with support for multiple Xilinx FPGA device families. It
is designed to support both Verilog-HDL and VHDL. The design
examples in this book are provided in Verilog.
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Size: 899078 |
Author: lee |
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Description: This sample provides a generic example of a PCI IDE minidriver. The sample isolates vendor-specific code from the higher-level PCI IDE bus driver, much as SCSI minidrivers isolate code from the SCSI port driver. See the Release Notes section for more information.
This sample works on both x86 and Alpha platforms, and is 64-bit compliant. It builds with Microsoft® Visual C® 6.0. It does not implement Plug and Play or Power Management.
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Size: 8553 |
Author: joe |
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Description: PCI32 is just a port of my 16-bit DOS program PCI to "true" win32 - that is, functionality under the 32-bit x86 builds of Windows NT 4.0, 2000, XP, 2003, Longhorn/Vista and so on. This program will NOT work under DOS/WIN9x/ME/OS2/Linux etc, or any 64-bit OS-PCI32 is just a port of my 16-bit DOS program PCI to "true" win32- that is, functionality under the 32-bit x86 builds of Wi Windows NT 4.0, 2000, XP, 2003, Longhorn/Vista and so on. This program will NOT work under DOS/WIN9x/ME/OS2/Linux etc, or any 64-bit OS!
Platform: |
Size: 250880 |
Author: |
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Description: PCI设计指南The Xilinx LogiCORE PCI interface is a fully verified, pre-implemented
PCI Bus interface. This interface is available in 32-bit and 64-
bit versions, with support for multiple Xilinx FPGA device families. It
is designed to support both Verilog-HDL and VHDL. The design
examples in this book are provided in Verilog.-PCI Design Guide The Xilinx LogiCORE PCI interface is a fully verified, pre-implementedPCI Bus interface. This interface is available in 32-bit and 64-bit versions, with support for multiple Xilinx FPGA device families. Itis designed to support both Verilog-HDL and VHDL. The designexamples in this book are provided in Verilog.
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Size: 899072 |
Author: lee |
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Description: This sample provides a generic example of a PCI IDE minidriver. The sample isolates vendor-specific code from the higher-level PCI IDE bus driver, much as SCSI minidrivers isolate code from the SCSI port driver. See the Release Notes section for more information.
This sample works on both x86 and Alpha platforms, and is 64-bit compliant. It builds with Microsoft® Visual C® 6.0. It does not implement Plug and Play or Power Management. -This sample provides a generic example of a PCI IDE minidriver. The sample isolates vendor-specific code from the higher-level PCI IDE bus driver, much as SCSI minidrivers isolate code from the SCSI port driver. See the Release Notes section for more information. This sample works on both x86 and Alpha platforms, and is 64-bit compliant. It builds with Microsoft
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Size: 8192 |
Author: joe |
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Description: 外围组件接口技术（Peripheral Component Interconnect PCI）是一种新型的高带宽、处理器无关的总线系统。它既可以作为中间层的总线也可以作为周边总线系统使用。与其他普通总线规范想对照，PCI 总线为高速I/O设备提供了更好的支持（比如图形适配器、网络接口控制器、磁盘控制器，等等）。现行的标准允许在33Mhz下使用64根数据线，纯传输速率可达2.11Gbps。但是PCI吸引人的地方不在于它的高速度，它适应了现代I/O设备对系统的要求，并且只需要很少的芯片就可以实现并支持其他总线系统。-Peripheral Component Interface Technology (Peripheral Component Interconnect PCI) is a new type of high-bandwidth, the processor s bus system has nothing to do. It can serve as a middle layer of the bus can also be used as a peripheral bus system. With other norms would like to control the ordinary bus, PCI bus for high-speed I/O device provides a better support (such as graphics adapters, network interface controllers, disk controllers, etc.). Existing standard to allow 33Mhz using 64 data lines, pure transfer rate up to 2.11Gbps. PCI attractive place but do not lie in its high-speed, it adapted to the modern I/O devices on the system requirements, and require only a few chips can be achieved and to support other bus systems.
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Size: 274432 |
Author: gpscar |
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Description: 64位pci插槽转换座的pcb和原理图，速度较高的适配器使用64位插槽。-64-bit pci slot converter pcb Block and schematic diagram, a higher speed adapters use 64-bit slots.
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Size: 29696 |
Author: li |
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Description: PCI 总线规范是由 INTEL公司为首的一个 PCI 特别兴趣小组（PCI SIG）制定并维护的
一种 32/64 位局部总线， 可进行 32 位寻址， 也可以进行突发传送。 其最高传输能力为 132MB/S
（32 位时）-PCI bus specification by INTEL Corporation, headed by a PCI Special Interest Group (PCI SIG) to develop and maintain a 32/64 bit local bus, can be 32-bit addressing can also be sent to emergencies. Maximum transmission capacity of 132MB/S (32 places)
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Size: 2777088 |
Author: 王帅 |
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Description: This design example shows possible interface between instantiation of Altera s 64-bit pci target megafunction and 64-bit synchronous memory -This design example shows possible interface between instantiation of Altera s 64-bit pci target megafunction and 64-bit synchronous memory
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Size: 26624 |
Author: minitman |
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Description: PCI-ip硬件描述语言-开源的，可以做参考设计，如果需要的话，-This models are written in VHDL!
Author is Ovidiu Lupas!
MASTER model
generates PCI compliant signals
checks Target signal compliance with PCI
checks data received from Target for correctness
generates assertion reports if Target signals are not PCI compliant
TARGET model
generates PCI compliant signals
checks Master signal compliance with PCI
checks data received from Master for correctness
generates assertion reports if Master signals are not PCI compliant
Description
The models are boardlevel simulation models and are useful in the testing phase
of
the PCI cores design. The models are 32 bit, 33 MHz PCI compliant but are easy
upgradable to 64 bit, 66 MHz. The models are free you can redistribute them
and/or modify them under the terms of the GNU General Public License as
published by the Free Software Foundation either version 2 of the License, or
(at your option) any later version.
The models are distributed in the hope that they will be useful, but WITH
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Size: 6144 |
Author: kity |
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Description: CX23880
64-Bit PCI TV/FM Cards WHQL
Submission Guidelines
Application Note
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Size: 444416 |
Author: giuseppe |
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Description: mmconfig-shared.rar - Low-level direct PCI config space access via MMCONFIG - common code between i386 and x86-64.
-mmconfig-shared.rar - Low-level direct PCI config space access via MMCONFIG - common code between i386 and x86-64.
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Size: 5120 |
Author: zengtonsin |
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Description: win7-64 altera pci express hard ip demo测试程序。-win7-64 altera pci express hard ip demo test program
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Size: 2289664 |
Author: 覃灵 |
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Description: CIS图像高速采集64位PCI卡的设计与实现-Design and implementation of 64-bit high-speed PCI card CIS image acquisition
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Size: 803840 |
Author: andy |
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Description: The probing of PCI controllers from of_platform is currently 64 bits only, mostly due to gratuitous differences between the 32 and 64 bits PCI code on PowerPC and the 32 bits one lacking some bits needed here.
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Size: 2048 |
Author: taiyangqong |
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Description: Low-level direct PCI config space access via MMCONFIG - common code between i386 and x86-64.
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Size: 6144 |
Author: lengbbzh |
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Description: Bus Unit ID macros get low and hi 32-bits of the 64-bit BUID.
-Bus Unit ID macros get low and hi 32-bits of the 64-bit BUID.
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Size: 1024 |
Author: xuesvrw |
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Description: mmconfig-shared.c - Low-level direct PCI config space access via MMCONFIG - common code between i386 and x86-64.
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Size: 6144 |
Author: rervongmou |
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Description: C#下的工控软件，用于PCI开发的运动设备，内有G代码解析，运动规划，文件流操作，面向对象操作等知识。-Industrial control software C# under development for PCI sports equipment, there are G code analysis, motion planning, file stream operations, knowledge of object-oriented operation.
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Size: 917504 |
Author: 雷大神 |
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