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[VHDL-FPGA-Verilog] pll

Description: 用VHDL写的数字锁相环程序 pll.vhd为源文件 pllTB.vhd为testbench-pll.vhd : PLL written in VHDL hardware language. pllTB.vhd is a test program for pll.vhd.
Platform: | Size: 111616 | Author: 孙犁 | Hits:

[ARM-PowerPC-ColdFire-MIPS] TEA5767-PLL

Description: TEA5767-PLL收音机整套方案（汇编源码）-TEA5767- PLL radio package (compiled source code)
Platform: | Size: 159744 | Author: | Hits:

[Communication-Mobile] DDS+PLL

Description: 基于FPGA的新的DDS+PLL时钟发生器-FPGA-based new DDS PLL clock generator
Platform: | Size: 145408 | Author: 李敏 | Hits:

[Communication-Mobile] pll

Description: 关于锁相环的MATLAB的仿真程序，其中有详细的注释，希望它能能对你的能有所帮助-PLL on the MATLAB simulation program, including a detailed Notes hope it can be your right, can be helped
Platform: | Size: 2048 | Author: sun | Hits:

[Communication-Mobile] pll

Description: matlab在电力电子技术仿真中运用，包括PLL的具体仿真实现，一些滤波算法的实现，很有用-matlab simulation in power electronic technology to use, including the specific PLL simulation, a number of filtering algorithms to achieve useful
Platform: | Size: 1325056 | Author: xulin | Hits:

[matlab] pll

Description: 仿真了锁相环工作到一定时间后达到锁定状态的过程，程序采用的是一阶RC低通滤波器即二阶一型环-Simulation of the PLL to work until after a certain period of time to achieve lock-state process, the procedure is used first-order RC low-pass filter that is second-order one-ring
Platform: | Size: 1024 | Author: ZHangdaojie | Hits:

[VHDL-FPGA-Verilog] pll

Description: fpga中pll时钟实现的源代码，可实现倍频或分频-pll clock in the FPGA to achieve the source code, can be realized or sub-octave frequency
Platform: | Size: 3072 | Author: 张恒 | Hits:

[ARM-PowerPC-ColdFire-MIPS] PLL

Description: DP256_HCS12_PLL锁相环驱动程序-DP256_HCS12_PLL PLL Driver
Platform: | Size: 481280 | Author: 王鹏伟 | Hits:

[Software Engineering] A.spur-free.fractional-N.pll

Description: A new PLL topology and a new simplified linear model are presented. The new fractional-N synthesizer presents no reference spurs and lowers the overall phase noise, thanks to the presence of a SampleJHold block. With a new simulation methodology it is possible to perform very accurate simulations, whose results match closely those obtained with the linear PLL model developed.
Platform: | Size: 236544 | Author: 谢振 | Hits:

[matlab] Matlab-pll

Description: 附件里的代码，里面有详细过程说明： Phasell.m pll.m -Annex of the code, there are detailed process description: Phasell.mpll.m
Platform: | Size: 7168 | Author: mzb | Hits:

[Embeded-SCM Develop] PLL

Description: 关于在FPGA或CPLD锁相环PLL原理与应用,介绍用FPGA的分频技术.-FPGA or CPLD on the Theory and Application of phase-locked loop PLL, introduce sub-band using FPGA technology.
Platform: | Size: 94208 | Author: yjc | Hits:

[DSP program] PLL

Description: pll算法是来自经典的DSP的C程序和汇编程序库-pll algorithm is from the classic DSP procedures and compilation of the C library
Platform: | Size: 128000 | Author: | Hits:

[matlab] pll-linear

Description: 该程序描述了二阶锁相环的环路滤波器的设计和线性模型分析-The program describes the second-order PLL loop filter design and linear model analysis
Platform: | Size: 1024 | Author: vie | Hits:

[VHDL-FPGA-Verilog] PLL

Description: PLL 时钟模块　　Quartus II平台的简单设计实例　附仿真波形-PLL clock module Quartus II platform attached to a simple design example simulation waveforms
Platform: | Size: 806912 | Author: 许东滨 | Hits:

[Communication-Mobile] PLL

Description: 锁相环控制，用的IC是AT89C2051，用P1口做控制，不知大家有没兴趣-PLL control IC is used AT89C2051, using P1 control I do, I do not know you have no interest
Platform: | Size: 2048 | Author: sumiao | Hits:

[Software Engineering] PLL

Description: 国外一篇很好的数字锁相环（PLL）设计文档（解压后PLL.pdf），不可不看呦！-Abroad, a good digital phase-locked loop (PLL) design documents (after extracting PLL.pdf), can not look at Yo!
Platform: | Size: 352256 | Author: | Hits:

[Special Effects] pll

Description: 介绍一个小的进行锁相环PLL仿真的信号预处理程序-Introduced to carry out a small simulation of phase-locked loop PLL signal pre-processing procedures
Platform: | Size: 1024 | Author: 刘静 | Hits:

[DSP program] PLL

Description: 可以实现自动锁相环功能的C源程序代码模块，-Can be achieved automatically PLL function C source code modules,
Platform: | Size: 6144 | Author: 刘磊 | Hits:

[VHDL-FPGA-Verilog] PLL

Description: verilog PLL的代码，和PLL 的功能介绍，希望能通过，只是简单了点-verilog PLL code, and the function of PLL, the hope, but simply a point
Platform: | Size: 18432 | Author: gjj | Hits:

[Communication-Mobile] pll

Description: 关于数字锁相环方面的代码,觉得还可以，或许对大家有用-the code of the pll
Platform: | Size: 2048 | Author: joe | Hits:
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