Description: Xilinx的modelsim 仿真库!里面有许多库函数,对于vlog或vhdl编程有很多好的源代码可以剪切!-Xilinx modelsim simulation library! There are many libraries, vlog or VHDL programming a lot of good source code can shear! Platform: |
Size: 32190464 |
Author:杨俊涛 |
Hits:
Description: fpga中pll时钟实现的源代码,可实现倍频或分频-pll clock in the FPGA to achieve the source code, can be realized or sub-octave frequency Platform: |
Size: 3072 |
Author:张恒 |
Hits:
Description: 对一般的PLL及APLL,定点PLL进行了MATLAB SIMULINK仿真,可以由程序直接生成PLL的VHDL和C源代码-General PLL and APLL, fixed-point MATLAB SIMULINK a PLL simulation, can be directly generated by the PLL of VHDL and C source code Platform: |
Size: 398336 |
Author:joshua |
Hits:
Description: 实现同步时采用锁相环,锁相环实现的原理,及源代码,-Implementation of the principle of phase-locked loop, and the source code, Platform: |
Size: 111616 |
Author:qin |
Hits:
Description: 用VHDL语言编写的锁相环源代码,可用于配置FPGA,在FPGA中实现PLL功能。-VHDL language with PLL source code, can be used to configure the FPGA, PLL function is implemented in the FPGA. Platform: |
Size: 3072 |
Author:王羽翾 |
Hits:
Description: 用VHDL写的数字锁相环程序源码 pll.vhd为源文文件 pllTB.vhd为testbench 可直接使用。
-Written using VHDL digital PLL pll.vhd program source code for the source text file pllTB.vhd testbench can be used directly. Platform: |
Size: 111616 |
Author:陪同 |
Hits: