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Description: PWM/TIMER/COUNTER VHDL IP core
Platform: |
Size: 272384 |
Author: hehilon |
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Description: 用硬件描述语言实现的灯控IP核,可实现至少256种颜色的真彩变换。-using Hardware Description Language lights control IP core can achieve at least 256 colors transform the sleekly.
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Size: 1024 |
Author: 耿丽 |
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Description: 在SOPC平台上,开发得MP3源代码,包括mp3软解码,图形界面!还包括了TFT,PWM的IP!-In SOPC platform, the development of a MP3 source code, including mp3 soft decoding, graphical interface! Also includes a TFT, PWM s IP!
Platform: |
Size: 1692672 |
Author: lrt |
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Description: 本程序代码是TCP/IP在最新流明诺瑞ARM单片机+ucosii平台上实现的TCP/IP源代码,希望对同仁有用.-This procedure code is a TCP/IP in the latest诺瑞ARM lumens Singlechip+ Ucosii platform realize the TCP/IP source code, in the hope that useful Tongren.
Platform: |
Size: 1420288 |
Author: King |
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Description: 这是一个完整的pwm ip 核,可在sopc中实例化该核,下载即可用,绝对好使。-This is a complete nuclear pwm ip can be instantiated in SOPC in the nuclear, you can download, and absolutely so.
Platform: |
Size: 18432 |
Author: lizhiqiang |
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Description: Avalon总线下的PWM的IP模块。基于VHDL语言。-Avalon Bus IP of the PWM module. Based on the VHDL language.
Platform: |
Size: 20480 |
Author: 李超 |
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Description: 关于如何在SOPC中加入自定制的IP,并以PWM波为例,一步一步的进行了设置并讲解-SOPC on how to add customized IP, and the PWM wave for example, carried out step by step set up and on
Platform: |
Size: 1274880 |
Author: hebei |
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Description: 基于ALTERA公司NIOSII的LED灯控PWM IP核设计-ALTERA-based company controlled NIOSII the LED lamp PWM IP-core design
Platform: |
Size: 10481664 |
Author: 王超 |
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Description: quartus的几个IP核(PWM,RAM,I2C)-quartus several IP core (PWM, RAM, I2C)
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Size: 226304 |
Author: 宋瑞 |
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Description: 将此文件解压缩,会得到一个"ip"目录,将此目录放入你的项目中,就可以在sopc中import到一个叫pwm的组建了。解压缩还会得到一个C语言文件,它是与硬件配合的Nios2_C代码
-Extract this file will get an " ip" directory into this directory in your project, you can import into the sopc in the formation of a called pwm. Extract will get a C language file, which is the code and hardware co-ordination Nios2_C
Platform: |
Size: 5120 |
Author: 于艳超 |
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Description: sopc的制作ipcore,有需要的下载啊-sopc
Platform: |
Size: 5120 |
Author: 温建平 |
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Description: 利用Verilog语言产生17路PWM波,控制17路舵机,可以作为IP核添加到AVALON总线上,在nios IDE里用C语言控制。-Using Verilog language production of 17 Road PWM signal to control 17 Servos, can be used as IP core to the AVALON bus, in the nios IDE in control with the C language.
Platform: |
Size: 3072 |
Author: 尹长生 |
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Description: 用VHDL语言 描述 生成pwm的 IP核-Pwm using VHDL language to describe the generation of IP core
Platform: |
Size: 1024 |
Author: chong |
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Description: 在Quartus 9.0 下实现的PWM IP核设计,周期占空比均可调。-PWM IP core design,which period and duty is adjustable.
Platform: |
Size: 1024 |
Author: zgm |
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Description: 基于xilinx FPGA软核microblaze编写的PWM波产生IP核,在EXCD开发板上调试通过,内附UCF文件和说明-it s an IP core based on microblaze,it can produce pwm wave.
Platform: |
Size: 17408 |
Author: JK |
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Description: verilog描述 PWM IP核
内部包括载波 占空比 和时能寄存器-IP kernel of PWM based on Verilog hdl
Platform: |
Size: 4096 |
Author: 胡静 |
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Description: Verilog 语言开发的PWM IP软核 验证实现了PWM 输出-Verilog language development of PWM IP verified to achieve a soft-core PWM output
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Size: 702464 |
Author: wangjinwu |
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Description: PWM IP 核的verilog HDL代码-CODE of the PWM IP
Platform: |
Size: 1024 |
Author: mr li |
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Description: PWM的NIOS II IP核设计源文件,其频率和脉宽均可控-PWM IP core design source files of the NIOS II , It s frequency and pulse-width words can be controlled
Platform: |
Size: 1024 |
Author: zgm |
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Description: 自定义pwm ip核,符合AVALON总线-Custom PWM IP core, in line with the avalon bus
Platform: |
Size: 5093376 |
Author: 刘志军 |
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