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[VHDL-FPGA-Verilog] Pseudo-random-code

Description: 基于FPGA实现的伪随机序列快速同步.rar-FPGA-based pseudo-random sequence to achieve fast synchronization. Rar
Platform: | Size: 185344 | Author: | Hits:

[Crack Hack] lfsr

Description: 伪随机序列产生器－线性反馈移位寄存器，Verilog HDL 原代码。-Pseudo-random sequence generator- linear feedback shift register, Verilog HDL source code.
Platform: | Size: 1024 | Author: 李辛 | Hits:

Description: 本文设计了一种简捷而又高效的伪随机序列产生方法，最后通过统计对比，说名这种方法产生的随机序列不仅周期长还具有两好的随机特性-This paper designed a simple and efficient method for the selection of pseudo-random sequence, and finally through statistical comparison, saying that this method of random sequence generated by not only the long cycle and also has two well-randomness
Platform: | Size: 268288 | Author: 5656 | Hits:

[VHDL-FPGA-Verilog] prbs

Description: 伪随机二进制序列发生器的Verilog源码，带测试文件，并在FPGA开发板上成功验证-Pseudo-random binary sequence generator Verilog source code, with a test file, and successfully verified in FPGA development board
Platform: | Size: 50491392 | Author: wang | Hits:

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[VHDL-FPGA-Verilog] Pseudo-random-code

[Crack Hack] lfsr

[VHDL-FPGA-Verilog] prbsforip

[VHDL-FPGA-Verilog] prbs

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