Search - QII 10

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[Multimedia Develop] VBuffer_1c6 DL : 0: 视频采集并锁存到SDRAM中的完整代码，运行环境为QII，VHDL与标准参数宏模块调用混合设计　是学习视频采集的很好的参考-Video Capture SDRAM and latches to the integrity code, the operating environment for QII. VHDL standard parameter-called hybrid module is designed to study the Video Capture good reference
Update : 2025-02-17 Size : 3.94mb Publisher : 刘留
[VHDL-FPGA-Verilog] SPI_VHDL DL : 0: SPI串口的内核实现（vhdl）,可以用qII等软件直接加到FPGA或者CPLD里面.-the SPI Serial Kernel (vhdl) can be used directly qII software foisted CPLD or FPGA inside.
Update : 2025-02-17 Size : 13kb Publisher : efly
[Embeded-SCM Develop] Compact_Flash_IDE_hard_disk_interface DL : 0: 这是一个基于FPGA的CF卡读写程序，在QII下综合-This is a FPGA-based CF card reader procedures qii under the Comprehensive
Update : 2025-02-17 Size : 28kb Publisher : zlw
[Embeded-SCM Develop] SD_Card_Audio DL : 0: 一个基于FPGA的SD卡读写程序，QII综合。希望有用。-FPGA-based SD card reader program, QII integrated. I hope useful.
Update : 2025-02-17 Size : 11.68mb Publisher : zlw
[VHDL-FPGA-Verilog] LCD1602 DL : 0: LCD1602显示源代码 1。源文件保存在src目录，QII的工程文件保存在Proj目录； 2。程序实现的功能是标准的16×2字符型液晶模块上显示字符串； 3-LCD1602 display the source code 1. Source file stored in the src directory, QII the project file stored in the directory Proj 2. Realize the function of the procedure is a standard 16 × 2 character LCD module to display the string 3
Update : 2025-02-17 Size : 700kb Publisher : 张海风
[Embeded-SCM Develop] multiprocessor DL : 0: verilog语言编写的多处理器的程序代码，用QII直接打开即可-Verilog language, multi-processor code, using qii can directly open
Update : 2025-02-17 Size : 2.46mb Publisher : 侯典华
[VHDL-FPGA-Verilog] VHDL_VGA DL : 0: 源文件保存在src目录，QII的工程文件保存在Proj目录；程序实现的功能是在VGA显示器上显示彩色条纹，共8种颜色
Update : 2025-02-17 Size : 243kb Publisher : liukun
[VHDL-FPGA-Verilog] 4x4KEY DL : 0: 首先将下载板插到主板上面. 1。源文件保存在src目录，QII的工程文件保存在Proj目录； 2。程序实现的功能测试4×4键盘按键；具体的键值通过板上的数码管来显示。按下K1就显示1,K2就显示2.用户可以试试. 3。具体设计参考代码。-First, download the board into the motherboard above .1. Source file stored in the src directory, QII the project file stored in the directory Proj 2. Realize the functional test procedures for 4 × 4 keyboard keys specific digital keys through the board to show possession. K1 press on the display 1, K2 on the display 2. Users can try .3. Specific reference code.
Update : 2025-02-17 Size : 68kb Publisher : Jak
[SCM] LCD1602 DL : 0: 首先将核心板插在EDA底板4.0上面,然后将板上的跳线J20 EXT_SEL跳到ON,也就是插上. 1。源文件保存在src目录，QII的工程文件保存在Proj目录； 2。程序实现的功能是标准的16×2字符型液晶模块上显示Welcome www.hseda.com!!字符串；-First of all, the core plate inserted in the EDA floor above 4.0, and then on-board jumpers J20 EXT_SEL jump ON, which is planted .1. Source file stored in the src directory, QII the project file stored in the directory Proj 2. Realize the function of the procedure is a standard 16 × 2 character LCD module to display Welcome www.hseda.com!! String
Update : 2025-02-17 Size : 790kb Publisher : Jak
[Other Embeded program] music DL : 0: 首先将核心板插在我们的EDA底板4.0上面,然后将板上的跳线J20 EXT_SEL跳到ON,也就是插上. 1。源文件保存在src目录，QII的工程文件保存在Proj目录； 2。程序实现的功能是播放出音乐-First of all, the core plate inserted in our EDA floor above 4.0, and then on-board jumpers J20 EXT_SEL jump ON, which is planted .1. Source file stored in the src directory, QII the project file stored in the directory Proj 2. Program
Update : 2025-02-17 Size : 270kb Publisher : Jak
[VHDL-FPGA-Verilog] VGA DL : 0: 这个试验要配合EDA4.0底板一起使用.先将核心板插在EDA4.0底板上面,然后接上VGA显示器. 1。源文件保存在src目录，QII的工程文件保存在Proj目录； 2。程序实现的功能是在VGA显示器上显示彩色条纹，共8种颜色； 3。具体设计参考代码。 -The pilot should be used in conjunction with the backplane EDA4.0. First core plate inserted EDA4.0 floor above, and then connect to VGA monitors .1. Source file stored in the src directory, QII the project file stored in the directory Proj 2. Realize the function of the procedure is displayed on the monitor in the VGA color stripes, a total of eight kinds of color 3. Specific reference code.
Update : 2025-02-17 Size : 57kb Publisher : Jak
[Graph program] VGA_change DL : 0: 程序可以在VGA显示器上以800x600分辨率显示方波示例和字母示例，源文件保存在src目录，QII的工程文件保存在Proj目录。-Program can display in VGA resolution display to 800x600 square sample and letters examples, source files stored in the src directory, QII the project file stored in the directory Proj.
Update : 2025-02-17 Size : 2.58mb Publisher : HENRRY
[VHDL-FPGA-Verilog] LED2 DL : 0: 采用Verilog hdl编程语言实现led显示，有工程代码用QII软件编译调试-led Verilog hdl
Update : 2025-02-17 Size : 110kb Publisher : zhangyanshuang
[VHDL-FPGA-Verilog] dsp-builder-7.2-crack DL : 1: 5款altera的FPGA开发板原理图，详细介绍了板子的构成及功能-Altera paragraph 5 of the FPGA development board schematics, detailed information on the composition and functions of board
Update : 2025-02-17 Size : 5kb Publisher : 张建
[VHDL-FPGA-Verilog] S8_VGA DL : 0: 1。源文件保存在src目录，QII的工程文件保存在Proj目录； 2。程序实现的功能是在VGA显示器上显示彩色条纹，共8种颜色，可以使用嵌入式逻辑分析仪观测信号； 3。modelsim仿真文件在proj--simulation--modelsim中 4。具体设计参考代码。-1. Source file stored in the src directory, QII stored in the project file directory Proj 2. Program' s function is displayed on the monitor in the VGA color stripes, a total of eight kinds of colors, you can use the embedded logic analyzer observation signal 3. modelsim simulation document proj- simulation- modelsim 4. Specific reference code.
Update : 2025-02-17 Size : 614kb Publisher : 刘飞
[VHDL-FPGA-Verilog] VGA DL : 0: 1。源文件保存在src目录，QII的工程文件保存在Proj目录； 2。程序实现的功能是在VGA显示器上显示彩色条纹，共8种颜色，可以使用嵌入式逻辑分析仪观测信号； 3。modelsim仿真文件在proj--simulation--modelsim中 4。具体设计参考代码。-1. The source file in src directory, QII project file saved in Proj directory 2. Program implementation function is to display color VGA display stripes, a total of eight kinds of colors, you can use the embedded logic analyzer observation signal 3. modelsim simulation file in proj- simulation- modelsim of 4. The specific design reference to the code.
Update : 2025-02-17 Size : 3.98mb Publisher : jiehao
[VHDL-FPGA-Verilog] S6_VGA_change DL : 0: 1。源文件保存在src目录，QII的工程文件保存在Proj目录； 2。程序可以在VGA显示器上以800x600分辨率显示方波示例和字母示例 3。具体设计参考代码。 -1. Source file in src directory, QII Proj project files in the directory 2. Program can display in 800x600 resolution VGA display and square-wave sample letters Example 3. Specific design reference code.
Update : 2025-02-17 Size : 436kb Publisher : 陈亮
[VHDL-FPGA-Verilog] S6_VGA DL : 0: 1。源文件保存在src目录，QII的工程文件保存在Proj目录； 2。程序实现的功能是在VGA显示器上显示彩色条纹，共8种颜色，可以使用嵌入式逻辑分析仪观测信号； 3。modelsim仿真文件在proj--simulation--modelsim中 4。具体设计参考代码。 -1. Source file in src directory, QII Proj project files in the directory 2. Program implementation function is displayed on the VGA display colored stripes, a total of 8 colors, you can use the embedded logic analyzer observation signal 3. modelsim simulation file in proj- simulation- modelsim in 4. Specific design reference code.
Update : 2025-02-17 Size : 227kb Publisher : 陈亮
[VHDL-FPGA-Verilog] 22_multi_speed_filter DL : 0: 基于FPGA的多速率滤波器的设计，verilog设计的，QII开发环境-FPGA-based multi-rate filter design, verilog design, QII development environment
Update : 2025-02-17 Size : 1.51mb Publisher : 洪依
[VHDL-FPGA-Verilog] Crack_QII_10.1_Windows DL : 0: quartus 10.1破解文件内部人员用-quartus 10.1 crack file with internal staff
Update : 2025-02-17 Size : 27kb Publisher : wang

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