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[Other resource] tcl_io

Description: quartus 中，自己写的tcl，分配io的例子。
Platform: | Size: 26323 | Author: xad | Hits:

[Other resource] quartusII

Description: 华为内部教程(比较早的) 对Quartus 流程中各阶段进行较为详细 的介绍最后简要介绍了一下如何使用TCL进行Quartus 流程的脚本方式运行
Platform: | Size: 2476955 | Author: 付茗 | Hits:

[Other resource] qts_qii52003

Description: Quartus II Tcl Scripting说明文档，详细说明了在quartus中如何使用Tcl脚本进行快速开发。
Platform: | Size: 241276 | Author: 杨开轶 | Hits:

[Embeded-SCM Develop] TCL_Training

Description: Quartus II的TCL脚本的教程，对学Quartus非常有用。
Platform: | Size: 618377 | Author: Jason | Hits:

[Other] Quartus+II+++ModelSim+SE+++后仿真+++库文件.rar

Description: Mentor公司的ModelSim是业界最优秀的HDL语言仿真软件，它能提供友好的仿真环境，是业界唯一的单内核支持VHDL和Verilog混合仿真的仿真器。它采用直接优化的编译技术、Tcl/Tk技术、和单一内核仿真技术，编译仿真速度快，编译的代码与平台无关，便于保护IP核，个性化的图形界面和用户接口，为用户加快调错提供强有力的手段，是FPGA/ASIC设计的首选仿真软件。
Platform: | Size: 1009119 | Author: t613@163.com | Hits:

[VHDL-FPGA-Verilog] quartusII

Description: 华为内部教程(比较早的) 对Quartus 流程中各阶段进行较为详细 的介绍最后简要介绍了一下如何使用TCL进行Quartus 流程的脚本方式运行-Huawei internal Tutorial (relatively early) on the flow in the various stages of Quartus conduct a more detailed introduction Finally then briefly introduce how to use the TCL flow for Quartus script run
Platform: | Size: 2477056 | Author: 付茗 | Hits:

[VHDL-FPGA-Verilog] qts_qii52003

Description: Quartus II Tcl Scripting说明文档，详细说明了在quartus中如何使用Tcl脚本进行快速开发。-Quartus II Tcl Scripting documentation detailing how to use the Quartus Tcl script for rapid development.
Platform: | Size: 240640 | Author: 杨开轶 | Hits:

[Other] TCLscript

Description: tcl脚本语言中文教程，可以看看，很不错的哦。-tcl scripting language English tutorial, you can see, very good, oh.
Platform: | Size: 618496 | Author: 相耀 | Hits:

[Embeded-SCM Develop] TCL_Training

Description:
Platform: | Size: 618496 | Author: Jason | Hits:

[Other Embeded program] pin-defination

Description: 使用tcl文件分配管脚 比如在quartus里面建立一个setup.tcl的tcl文件，器件为EP1C6Q240 第3，4行表示所有不用的管脚默认为输入三态 第6，7行分别把芯片的28和2脚分配给了设计中的clk和key1 -Use of tcl quartus such as file allocation pins inside a setup.tcl the tcl file, the device is EP1C6Q240 3,4 line that all unused pins default to input three-state line, respectively, the first 6,7, 28 and 2 of the chip feet allocated to the design of the clk and key1
Platform: | Size: 1024 | Author: hill | Hits:

[VHDL-FPGA-Verilog] quartus_tcl_example

Description: Quartus ii tcl/tk 脚本教程，全部是精华，方便网络不好的FPGA工程师参考。-Quartus ii tcl/tk script user guide, all very good for refrence, used while FPGA project.
Platform: | Size: 67584 | Author: wds | Hits:

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