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[Other] pathfinding DL : 0: prolog 找路例子程序： === === === Part 1-Adding connections Part 2-Simple Path example | ?- path1(a,b,P,T). will produce the response: T = 15 P = [a,b] ? Part 3 - Non-repeating path As an example, the query: ?- path2(a,h,P,T). will succeed and may produce the bindings: P = [a,depot,b,d,e,f,h] T = 155 Part 4 - Generating a path below a cost threshold As an example, the query: ?- path_below_cost(a,[a,b,c,d,e,f,g,h],RS,300). returns: RS = [a,b,depot,c,d,e,g,f,h] ? RS = [a,c,depot,b,d,e,g,f,h] ? no ================================== -prolog to find a way examples : ==================================== Part 1-Adding connections Part 2 - Simple Path example | - path1 (a, b, P, T). will produce the response : T = 15, P = [a, b] Part 3-Non-repeating path As an example, the query :-path2 (a, h, P, T). will succeed and may produce the bindings : P = [a, depot, b, d, e, f, h] T = 155 Part 4-Generating a path below a cost threshold As an example, the query :-path_below_cost (a, [a, b, c, d, e, f, g, h], RS, 300). returns : RS = [a, b, depot, c, d, e , g, f, h] RS = [a, c, depot, b, d, e, g, f, h] no =====================
Date : 2008-10-13 Size : 1.8kb User : Fa
[Other resource] [Serial_communication_c_programmer_guide] DL : 1: [美]Joe Campbell 著徐国定廖卫东张庆译吴洪来赵军审校清华大学出版社第一部分串行通信基础第l章 ASCII字符集第2章异步通信技术基础第3章错误及错误检测第4章信息传输第5章调制解调器及其控制第6章 UART:一个概念上的模型第7章实际的UART 第8章 baseline灵巧型调制解调器第9章智能调制解调器命令第10章协议调制解调器第ll章传真机第二部分用C语言编写异步通信程序第12章设计一个基本的串行I／O库第13章程序的可移植性第14章波特率和数据格式函数第15章 RS—232输入控制第16章流控制和SIO管理第17章格式输出第18章格式输入第19章中断I／O导论第20章中断子处理程序第2l章灵巧型调制解调器程序设计第22章 XMODEM文件传送第23章循环冗余校验CRC计算第24章 Group3传真图象的编码和解码
Date : 2008-10-13 Size : 17.07mb User : fanny
[Other resource] RS_01 DL : 0: RS(15,9)上的C语言纠错源码.在VC++6.0平台上调试通过，可以纠正任意24bit的错码
Date : 2008-10-13 Size : 10.65kb User : ATK
[Other resource] 043e09dc-24fa-4069-97fe-2bd3d7abf050 DL : 0: rt12864m样例程序，管脚号管脚名称电平管脚功能描述 1 VSS 0V 电源地 2 VCC +5V 电源正 3 V0 - 对比度（亮度）调整 4 RS(CS） H/L RS=\"H\",表示DB7--DB0为显示数据 4 RS(CS） H/L RS=\"L\",表示DB7--DB0为显示指令数据 5 R/W(SID) H/L R/W=\"H\",E=\"H\",数据被读到DB7--DB0 5 R/W(SID) H/L R/W=\"L\",E=\"H→L\", DB7--DB0的数据被写到IR或DR 6 E(SCLK) H/L 使能信号 7 DB0 H/L 三态数据线 8 DB1 H/L 三态数据线 9 DB2 H/L 三态数据线 10 DB3 H/L 三态数据线 11 DB4 H/L 三态数据线 12 DB5 H/L 三态数据线 13 DB6 H/L 三态数据线 14 DB7 H/L 三态数据线 15 PSB H/L H：8位或4位并口方式，L：串口方式（见注释1） 16 NC - 空脚 17 /RESET H/L 复位端，低电平有效（见注释2） 18 VOUT - LCD驱动电压输出端 19 A VDD 背光源正端（+5V）（见注释3） 20 K VSS 背光源负端（见注释3）
Date : 2008-10-13 Size : 20.94kb User : 白水
[VHDL-FPGA-Verilog] rs_decoder_31_19_6.tar DL : 1: Hard-decision decoding scheme Codeword length (n) : 31 symbols. Message length (k) : 19 symbols. Error correction capability (t) : 6 symbols One symbol represents 5 bit. Uses GF(2^5) with primitive polynomial p(x) = X^5 X^2 + 1 Generator polynomial, g(x) = a^15 a^21*X + a^6*X^2 + a^15*X^3 + a^25*X^4 + a^17*X^5 + a^18*X^6 + a^30*X^7 + a^20*X^8 + a^23*X^9 + a^27*X^10 + a^24*X^11 + X^12. Note: a = alpha, primitive element in GF(2^5) and a^i is root of g(x) for i = 19, 20, ..., 30. Uses Verilog description with synthesizable RTL modelling. Consists of 5 main blocks: SC (Syndrome Computation), KES (Key Equation Solver), CSEE (Chien Search and Error Evaluator), Controller and FIFO Register. -Hard-decision decoding scheme Codeword l KV (n) : 31 symbols. Message length (k) : 19 symbols. Error correction capability (t) : 6 symbols One symbol represents five bit. Uses GF (2 ^ 5) with primitive polynomial p (x) = x ^ x ^ 5 2 1 Ge nerator polynomial. g (x) = a ^ a ^ 15* 21 ^ 6 a X* X ^ a ^ 15 2* X ^ a ^ 3 25* X ^ a ^ 4 17 5* X ^ a ^ 18 ^ 6 X* a* X 30 ^ 7 ^ a ^ 20* X ^ a ^ 23 8* X ^ a ^ 9* 27 X 10 ^ a ^ 24* 11 ^ X ^ X 12. Note : a = alpha, primitive element in GF (2 ^ 5) and a ^ i is the root of g (x) for i = 19, 20, ..., 30. Uses Verilog description with synthesizab le RTL modeling. Consists of five main blocks : SC (Syndrome Computation), KES (Key Equation Solver). CSEE (Chien Search and Error Evaluator) Controller and FIFO Register.
Date : 2025-07-11 Size : 14kb User : 许茹芸
[DSP program] RS_01 DL : 0: RS(15,9)上的C语言纠错源码.在VC++6.0平台上调试通过，可以纠正任意24bit的错码-RS (15,9) on the C language source code error correction. In VC++ 6.0 platform debugging passed, to correct the fault of any 24bit code
Date : 2025-07-11 Size : 173kb User : ATK
[Algorithm] rs_code DL : 0: rs(15,11)编码实现，对于学习RS编码原理的人员可以作为一个例子学习，也可以应用于相应的系统中。 -rs (15,11) encoding the realization of the principle of learning personnel RS coding can be used as an example of learning, can also be applied to the corresponding system.
Date : 2025-07-11 Size : 43kb User : lzy
[Communication-Mobile] John.Wiley.and.Sons.Essentials.of.Error.Control.Co DL : 0: 第1章　用于可靠数字传输和存储的编码第2章　代数引论第3章　线性分组码第4章　重要的线性分组吗第5章　循环码第6章　二进制BCH码第7章　非二进制BCH码、RS码及其译码算法第8章　大数逻辑可译码有限几何码第9章　线性分组码的网络第10章　基于可靠性的线性分组码软判决译码算法第11章　卷积码第12章　卷积码的最优译码第13章　卷积码的次优译码第14章　基于网络的软判决译码算法第15章　级联编码、码分解与多阶段译码第16章　Turbo编码　第17章　低密度单奇偶校验码第18章　网络编码调制第19章　分组编码调制第20章　纠突发错误码第21章　纠突发错误卷积码第22章　自动请求重传（ARQ）策略附录A　伽罗华域的表附录B　GF（2m）中元素的最小多项式附录C　长度至2　10-1的二进制本原BCH码的生成多项式 9.6 卷积码 -Error-controlled coding techniques are used to detect and/or correct errors that occur in the message transmission in a digital communications system. Wireless personal channels used by mobile communications systems and storage systems for digital multimedia data all require the implementation of error control coding methods. Demonstrating the role of coding in communication and data storage system design, this text illustrates the correct use of codes and the selection of the right code parameters. Relevant decoding techniques and their implementation are discussed in detail. Providing communication systems engineers and students with guidance in the application of error-control coding, this book emphasizes the fundamental concepts of coding theory while minimising the use of mathematical tools. * Reader-friendly approach ti coding in communication systems providing examples of encoding and decoding, information theory and criteria for code selection * Thorogh descriptions of releva
Date : 2025-07-11 Size : 2.38mb User : zhao yongqiang
[Windows Develop] rs_forney DL : 0: algoritm Forney for rs(15_13)
Date : 2025-07-11 Size : 2kb User : pavel44187
[Windows Develop] rs_berl DL : 0: algoritm berltkempa-messi for rs(15_13)
Date : 2025-07-11 Size : 1kb User : pavel44187
[3G develop] verilogHDL DL : 0: RS（31，15）译码关键步骤的veilog HDL算法实现，包括关键方程求解，错误位置估计，错误值计算等-RS (31,15) decoding a key step in the algorithm veilog HDL, including key equations, position estimation error, error value, such as
Date : 2025-07-11 Size : 12kb User : 冯小刚
[matlab] 10948201 DL : 0: 用matlab实现的RS码编码与解码器，实现了15，11RS码的编解码仿真，并编写了测试驱动，直观明确-Matlab implementation of RS codes with encoding and decoding devices to achieve 15,11 RS code decoding simulation, and the preparation of the test-driven, intuitive, clear
Date : 2025-07-11 Size : 376kb User : mimi
[matlab] RS_simulink DL : 0: RS编码的matlab仿真（m文件仿真）,对加入突发噪声信道的RS（15，11）编码进行的仿真.-RS coding matlab simulation (m simulation files), joining the burst noise channel RS (15,11) code for simulation.
Date : 2025-07-11 Size : 1kb User :
[matlab] RS_simu DL : 0: RS编码的matlab仿真,对加入突发噪声信道的RS（15，11）编码进行的仿真.-RS coding matlab simulation, burst noise channel to join the RS (15,11) code for simulation.
Date : 2025-07-11 Size : 1kb User :
[matlab] RS159 DL : 0: 对RS（15，9）编码算法进行matlab的实现和仿真-Matlab realization of RS (15,9) coding algorithm and simulation
Date : 2025-07-11 Size : 1kb User : 张帅
[Other] chapter8 DL : 0: 未编码和RS(15,11)编码的16-QAM在AWGN下的性能无交织时的误比特率ber 有交织时的误比特率-No coding and RS (15,11) coding of 16-QAM in AWGN of ber bit error rate when no interleaving interleaving the bit error rate of the
Date : 2025-07-11 Size : 41kb User : jade
[Other] rs DL : 0: rs纠错编码的使用，使用该纠错编码可以实现15个字节，11个信息字节，纠错2个字节的使用！-rs using error correction coding, error correction coding can be achieved using the 15 bytes, 11 bytes of information, an error correction using two bytes!
Date : 2025-07-11 Size : 13kb User : luo
[Com Port] rs(15.11) DL : 0: 通信系统中使用的RS编码解码的详细代码，可直接使用-RS encoding and decoding in a communication system using the detailed code can be used directly
Date : 2025-07-11 Size : 9kb User : Sango Han
[Communication-Mobile] rs_15_11 DL : 1: ReedSolomon RS(15,11) Verilog 编码和解码测试程序编码有两种实现方式串行和并行方式(ReedSolomon RS(15,11) Verilog Encoder&Decoder)
Date : 2025-07-11 Size : 14kb User : Ericxgj
[Communication-Mobile] temp DL : 0: 一个（15，11）RS编解码，不知道为什么一定要20字，这个设定真的蠢(A (15, 11) RS encoding and decoding)
Date : 2025-07-11 Size : 218kb User : 编号1991

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