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[ELanguageasync_transmitter

Description: 用verilog实现rs232通信async_transmitter.v-with verilog achieve rs232 communications async_transmitter.v
Platform: | Size: 974 | Author: weixing | Hits:

[ELanguageasync_receiver

Description: 用verilog实现rs232 receiveri -with verilog achieve rs232 receiveri
Platform: | Size: 1510 | Author: weixing | Hits:

[ELanguageasync_transmitter

Description: 用verilog实现rs232通信async_transmitter.v-with verilog achieve rs232 communications async_transmitter.v
Platform: | Size: 1024 | Author: weixing | Hits:

[ELanguageasync_receiver

Description: 用verilog实现rs232 receiveri -with verilog achieve rs232 receiveri
Platform: | Size: 1024 | Author: weixing | Hits:

[VHDL-FPGA-Veriloguart

Description: 用Verilog实现的串口异步通信,适用于RS232-Using Verilog realization of serial asynchronous communication, applied to RS232
Platform: | Size: 1126400 | Author: 王权 | Hits:

[OtherVerilog_PS2_RS232

Description: 实现PS/2接口与RS-232接口的数据传输, PS/2键盘上按下按键,可以通过RS-232自动传送到主机的串口调试终端上,并在数据接收区显示接收到的字符。 串口调试终端的设置:波特率115200,一个停止位,无校验位。 -The realization of PS/2 interface with RS-232 data interface, PS/2 keyboard to press the button, through RS-232 automatic transmission to the host serial debug terminal and reception area in the data display received characters. Serial debug terminal settings: 115200 baud rate, one stop bit, no parity bit.
Platform: | Size: 1607680 | Author: chalin tong | Hits:

[VHDL-FPGA-Verilogrs232

Description: 完整的RS232 Verilog源代码,支持波特率可调,支持调试命令,配合串口调试工具,可作为FPGA开发中的调试平台。-Full RS232 Verilog source code, support for baud rate is adjustable to support debugging command, with the serial debugging tools can be used as the debugging FPGA development platform.
Platform: | Size: 13312 | Author: 弘历 | Hits:

[VHDL-FPGA-Verilogseries_port

Description: 用verilog语言编写的串口收发程序,可以进行429总线数据与rs232口的通信。-With verilog program written in serial transceivers, can be 429 bus data and rs232 mouth communication.
Platform: | Size: 5120 | Author: 小刘 | Hits:

[VHDL-FPGA-Verilogrs232

Description: 用verilog实现的RS232时序控制,完整可以使用的-RS232 verilog implementation with timing control, you can use the full
Platform: | Size: 1950720 | Author: wangjinghui | Hits:

[VHDL-FPGA-Veriloghomework_final_ver1

Description: 用verilog写的PS2键盘通过RS232与PC机通信,并且通信内容通过VGA显示-PS2 keyboard with verilog to write computer communication via RS232 with the PC and the communication content through VGA display
Platform: | Size: 4268032 | Author: 邱柳钦 | Hits:

[VHDL-FPGA-Veriloguart_fpga4fun

Description: rs232通信代码,在自己的xilinx开发板上已验证通过-rs232 code with verilog has been verified
Platform: | Size: 232448 | Author: 许磊 | Hits:

[VHDL-FPGA-Veriloguartverilog

Description: 该程序是Verilog写的串口收发程序,具有基本的收发功能,经过验证,能使初学者很好了解rs232,和Verilog-The program is written in Verilog serial transceiver program, with the basic send and receive functions, proven, good for beginners can understand rs232, and Verilog
Platform: | Size: 38912 | Author: 徐飞 | Hits:

[Com PortVerilog_RS232(Uart)

Description: 用verilog编的rs232,uart串口程序,很好用-a program about rs232 with verilog
Platform: | Size: 2048 | Author: 孙天龙 | Hits:

[VHDL-FPGA-Verilogrs232

Description: 用verilog hdl实现RS232串口通讯-RS232 serial communication with the verilog hdl
Platform: | Size: 481280 | Author: 王菲 | Hits:

[VHDL-FPGA-VerilogUART(RS232)

Description: 用VERILOG语言实现的通用异步串行收发器(RS232收发器),波特率可设置,通讯稳定,已成功应用于实际项目。-VERILOG language with universal asynchronous serial transceivers (RS232 transceiver), the baud rate can be set, communication stability, has been successfully applied in actual projects.
Platform: | Size: 603136 | Author: zyb | Hits:

[Com Portlab-uart

Description: verilog RS232 讀取跟寫入和傳送資料-verilog RS232 with write and read data transfer
Platform: | Size: 181248 | Author: 林孟賢 | Hits:

[VHDL-FPGA-VerilogFPGA_51

Description: 51+FPGA架构的通讯口扩展,用verilog语言编写,扩展了I2C,SPI,RS232。-51+ FPGA architectures communication port expansion, with verilog language, extends the I2C, SPI, RS232.
Platform: | Size: 2926592 | Author: wcq | Hits:

[VHDL-FPGA-VerilogUART-Altera

Description: 使用Atera FPGA CycloneII 实现串口通信,遵循RS232协议。FPGA上的模块实现了数据的接收,取补码和发送。(Achieve serial communication with FPGA, following the protocol of RS232.)
Platform: | Size: 1809408 | Author: swy0721 | Hits:

[VHDL-FPGA-Verilogserial

Description: FPGA实现232通讯,用verilog语言(RS232 communication design in FPGA with verilog)
Platform: | Size: 2048 | Author: gq_zhou | Hits:

[VHDL-FPGA-Veriloguart

Description: RS232接口,uart用verilog语言实现(RS232 interface, uart with verilog language)
Platform: | Size: 1830912 | Author: yeyeyeyeye | Hits:
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