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Description: VHDL实现 DDS。大家共享吧，一起学习，一起进步-VHDL realize DDS. U.S. to share it with learning, with progress
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Size: 866304 |
Author: 赵颖 |
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Description: 实验图1是一含计数使能、异步复位和计数值并行预置功能4位加法计数器，例1是其VHDL描述。由实验图1所示，图中间是4位锁存器；rst是异步清信号，高电平有效；clk是锁存信号；-Figure 1 is a test with count enable, asynchronous reset and preset features include numerical parallel adder four counters, Example 1 is described in VHDL. By experiment shown in Figure 1, Figure 4 is the intermediate latch rst clearance signal is asynchronous, high effective clk is a latch signal
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Size: 3072 |
Author: 刘阳 |
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Description: 加减法计数器：
本例程为加减法计数器，主要实现的加减法计数的功能。
有3个控制端口：
1、rst复位控制低电平有效；
2、en使能控制高电平有效
3、up加/减控制，高电平加法，低电平减法。-vhdl
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Size: 26624 |
Author: 李志 |
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Description: 微程序控制电路是CPU 控制器的核心电路，控制产生指令执行时各部件协调工作所需的所有控制信号，以及下一条指令的地址。微程序控制器的组成如图6-12 所示，主要由三个部分组成，分别是微指令控制电路、微地址寄存器和微指令存储器lpm_rom 其中微指令控制电路用组合电路对指令中的1[7..2] 、操作台控制信号SWA 和SWB 的状态、状态寄存器的输出状态FC 、FZ ，产生微地址变化的控制信号，实现对微地址控制:微地址寄存器控制电路的基本输入信号是微指令存储器的下地址字段M[6..1] ，同时还受微指令控制电路的输出信号SE[6..1]和复位信号RST 的控制，输出下一个微指令的地址:控制存储器由FPGA 中的LPM ROM 构成，输出24 位控制信号。在24 位控制信号中，微命令信号为18 位，微地址信号豆位。在口时刻将打入微地址寄存器UA 的内容，即为下一条微指令地址.当T4时刻进行测试判别时，转移逻辑满足条件后输出的负脉冲，通过强制端将某一触发器置为"1"状态，完成地址修改。微程序控制器中的微控制代码可以通过对FPGA 中LPMß OM 的配置进行输入，通过编辑LPM ROM.mif 文件来修改微控制代码。详细情况可参考LPIÞ CROM的配置方法。微指令控制电路内部结构如图6-2 ， 6-3. 6-13 所示-Micro-program control circuit is the core CPU controller circuit, the control instruction execution produces the coordination of all parts of all the necessary control signals, and the next instruction address. The composition of micro-program controller shown in Figure 6-12, the main three components, namely, microinstruction control circuit, micro-address register and the microcode memory lpm_rom microcode control circuit which combination circuit with instruction in the 1 [ 7 .. 2], SWA and SWB console control signal state, the state register output state FC, FZ, produce changes in micro-address control signals, to realize the micro-address control: micro-address register control circuit input signal is the basic micro- The next address field instruction memory M [6 .. 1], but also by the microcode control circuit output signal SE [6 .. 1] and reset control signal RST, the output of the next microinstruction address: control memory by the FPGA in the LPM ROM form, the output 24-bit
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Size: 2584576 |
Author: 623902748 |
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Description: 一个VHDL实现的测频计
LIBRARY ieee
USE ieee.std_logic_1164.all
USE ieee.std_logic_arith.all
USE ieee.std_logic_unsigned.all
ENTITY freq IS
PORT( Fsignal : IN std_logic
-- Rst : IN std_logic
Gate : IN std_logic
Ready : OUT std_logic
Data_out : OUT std_logic_vector(31 downto 0)
overflow : OUT std_logic
)
END freq
-A VHDL implementation of frequency meter LIBRARY ieee USE ieee.std_logic_1164.all USE ieee.std_logic_arith.all USE ieee.std_logic_unsigned.all ENTITY freq IS PORT (Fsignal: IN std_logic - Rst: IN std_logic Gate: IN std_logic Ready: OUT std_logic Data_out: OUT std_logic_vector (31 downto 0) overflow: OUT std_logic) END freq
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Size: 1024 |
Author: 陈强 |
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Description: 16位运算器，包含+、-、与或非、移位等功能，内部指定a、b、cin，输入clk与rst，输出16位y与c\z标志位-16-bit arithmetic unit, including+,-, and or, shift and other functions, within the specified a, b, cin, input clk and rst, 16-bit output y and c \ z flag
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Size: 2048 |
Author: 张海洋 |
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Description: vhdl 实现三角波输出，分辨率可调，与比较器连用可以实现PWM输出-VHDL generic Triangle，ENTITY Triangle IS
port(
rst : in std_logic
clk : in std_logic
tri_data:out std_logic_vector(7 downto 0)
)
end Triangle
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Size: 1024 |
Author: zpf |
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Description: MATLAB is one of several tools for working with mathematics. As an experienced
programmer, I was skeptical at rst. Why should I learn another programming
language when I could do the work in C/C++? The answer was simple: working
with MATLAB is easier! Yes, there are some instances when one would want to
use another language. A compiled program, such as one written in C++, will run
faster than an interpreted MATLAB program (where each line is translated by the
computer when the program is run). For hardware design, one might want to write
a program in Verilog or VHDL, so that the program can be converted to a circuit.
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Size: 5274624 |
Author: erhan |
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Description: 输入时钟4MHz，分频至1Hz，对时钟计数，LED显示输出，加使能EN和复位RST(Input clock 4MHz, frequency division to 1Hz, clock count, LED display output, add enable EN and reset RST)
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Size: 1586176 |
Author: MmDawN
|
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