Description: 提出了一种基于FPGA的高阶高速F IR滤波器的设计与实现方法。通过一个169阶的均方根
升余弦滚降滤波器的设计,介绍了如何应用流水线技术来设计高阶高速F IR滤波器,并且对所设计的
FIR滤波器性能、资源占用进行了分析。-A high-level FPGA-based high-speed F IR filter design and implementation. Through a 169-order root mean square raised cosine filter roll-off design, describes how the application of technology to design high-end line of high-speed F IR filter, and for the design of FIR filter performance, resources to carry out an analysis of the occupier. Platform: |
Size: 208896 |
Author:王晓岚 |
Hits:
Description: 本程序用于完成BPSK、QPSK、pi/4QPSK、OQPSK、8PSK、16QAM、32QAM、64QAM和128QAM的调制仿真。并可任意扩展到MPSK和MQAM。程序分成四个部分，fir.m对基带码元序列进行脉冲成型，可选矩形脉冲，升余弦脉冲和平方根升余弦脉冲； modal.m 为主程序，完成岁各种信号的基带星座图映射、脉冲成型和调制；pi4QPSK.m 为pi/4QPSK信号的星座图映射程序；test1.m给出一个简单的频谱显示测试。-This procedure for the completion of BPSK, QPSK, pi/4QPSK, OQPSK, 8PSK, 16QAM, 32QAM, 64QAM and the modulation 128QAM simulation. Arbitrary and may be extended to MPSK and MQAM. Procedures are divided into four parts, fir.m of baseband symbol pulse sequences forming, optional rectangular pulse, raised cosine square root raised cosine pulse and pulse modal.m-based procedures, the completion of the age range of the base-band signal constellation diagram mapping, pulse shaping and modulation pi4QPSK.m for pi/4QPSK signal constellation diagram mapping procedures test1.m given spectrum shows a simple test. Platform: |
Size: 4096 |
Author:徐哲 |
Hits:
Description: 用窗函数法设计FIR 数字滤波器
能产生矩型窗、升余弦窗、改进升余弦窗和二阶升余弦窗的窗函数子程序-Window function method using FIR digital filter designed to produce the window rectangle, raised cosine window, improving the second order raised cosine window and the window raised cosine window function subprogram Platform: |
Size: 1024 |
Author:dingdangmao |
Hits:
Description: 采用窗函数法设计一个可实现的数字FIR升余弦脉冲成形滤波器xtuanna-Use of window functions can be implemented to design a digital FIR raised cosine pulse shaping filter .xtuanna Platform: |
Size: 1024 |
Author:anna |
Hits:
Description: 根升余弦基带成形滤波器的设计及其DSP实现.最后利用系数对称特性，在某软件无线电电台系统的DSP 芯片中编程，
实现均方根升余弦滤波器的成形滤波算法-First this essay introduces baseband shaped filter theory and
requirements of an SDR system on shaped filtering. And, the author
introduces various realization methods of FIR filter presently, in
addition the author expatiate on square-root raised-cosine filter and its
design in IS-95 software defined system. Finally, the author illustrates
the shaped filter realization based on software programming using
symmetry properties of FIR filter coefficients Platform: |
Size: 117760 |
Author:程文翔 |
Hits:
Description: 采用MATLAB编程，产生一个16QAM基带信号，并进行实数倍插值计算。要求符号率为1 MSymbol/s，采用均方根升余弦滤波成形，滚降系数=0.5。产生{…1，0，1，1，…}的伪随机序列，经过映射、4倍成形滤波、FIR半带滤波、实数倍内插滤波，最后输出4.315倍时域/频域响应。给出信号序列经过各级滤波的时域、频域结果-Using MATLAB programming, resulting in a 16QAM baseband signal, and the real multiples of the interpolation calculation. The requirements of symbol rate 1 MSymbol/s, the root mean square raised cosine filter shape, roll-off factor = 0.5. Generate {1,0,1,1, ...} of the pseudo-random sequence, mapping, four times the shaping filter, FIR half-band filter, in fact, several times interpolation filter, the final output of 4.315 times the time domain/frequency domain response. Given the signal sequence through all levels of filtering the time domain, frequency domain results Platform: |
Size: 239616 |
Author: |
Hits:
Description: 基于FPGA开发的11阶半带升余弦FIR滤波器，用在阅读器基带滤波时的抽取滤波器使用，采用verilog语言实现。-Raised cosine FIR filter based FPGA development 11 order of half-band decimation filter used in reader baseband filtering, using verilog language implementation. Platform: |
Size: 1024 |
Author:小梦 |
Hits:
Description: 基于FPGA实现的64阶升余弦FIR并行滤波器，采用iso18000.6c标准实现，具有很好的低通滤波效果，已通过后仿上板验证，采用verilog语言实现。-64 order raised cosine FIR FPGA-based parallel filters, implemented using iso18000.6c standard with a low-pass filtering effect imitation on the board has passed validation, using verilog language. Platform: |
Size: 4096 |
Author:小梦 |
Hits:
Description: 给出了基于频率采样、最小二乘、内插法、最优化法、升余弦法等设计的FIR和IIR滤波器范例-Based on the frequency of sampling, least squares, interpolation, optimization method, raised cosine law design FIR and IIR filter example Platform: |
Size: 3072 |
Author:高哇 |
Hits:
Description: 主要编写了一组二进制数据通过根升余弦滤波器后的波形，但并没有使用ISE内部的FIR滤波器内核，该程序相当于编写了一个根升余弦滤波器。-Mainly prepared a set of binary data through the root raised cosine filter waveform after, but did not use the ISE internal FIR filter kernel, the program is equivalent to the preparation of a root raised cosine filter. Platform: |
Size: 3737600 |
Author:林源 |
Hits:
Search - Raised Cosine fir