Search - SD card VHDL

[ARM-PowerPC-ColdFire-MIPS] 第1章－SD卡读写模块

Description: 第1章－SD卡读写模块 1. sdconfig.h: 该文件为SD卡读写模块配置头文件，用户可根据实际硬件条件进行修改. 2. SD目录 : SD卡读写模块的全部文件,一般不用修改. 3. 建议sdconfig.h文件不要放于SD目录中，因为SD目录中的文件一般无须修改,sdconfig.h通常会有改动. 4. 例子见上一级目录的SDExample目录.-Chapter 1-SD Card Reader module 1. Sdconfig.h : This document SD Card Reader module configuration files, users can be based on actual hardware changes. 2. SD Contents : SD Card Reader module all documents, generally need not be amended. 3. Recommendations sdconfig.h documents will not put SD directory because the directory SD generally no need to amend the document, sdconfig.h usually subject to change. 4. See above examples SDExample a directory of directories.
Platform: | Size: 168960 | Author: k14789 | Hits:

[VHDL-FPGA-Verilog] SDmmcfpgaconfig.tar

Description: MMC卡的VHDL源代码实现，经过大批量生产验证-MMC card VHDL source code to achieve, through large-scale production test
Platform: | Size: 5120 | Author: 喻袁洲 | Hits:

[SCM] SDcard_Driver

Description: SD卡的驱动程序，对于写这方面的驱动的来说有点参考。-SD card driver, it was driven by the terms a bit reference.
Platform: | Size: 15360 | Author: 陈木斌 | Hits:

[Other Embeded program] smartcard_vhdl

Description: SD卡读写的VHDL VHDL Source Files in Smartcard: Top.vhd - top level file smartcard.vhd conver2ascii.vhd binary2bcd.vhd lcd.vhd power_up.vhd-SD card reader of VHDLVHDL Source Files in Smartcard: Top.vhd- top level file smartcard.vhd conver2ascii.vhd binary2bcd.vhd lcd.vhd power_up.vhd
Platform: | Size: 420864 | Author: gbh | Hits:

[VHDL-FPGA-Verilog] FPGA-SD-COMMUNICATION

Description: 基于QUARTUSII软件实现FPGA（ATERA CYCLONE II系列）与SD卡SD模式通信所用语言位verilog HDL-QUARTUSII software implementation based on FPGA (ATERA CYCLONE II series) with SD Card SD mode digital communication language verilog HDL
Platform: | Size: 5064704 | Author: chenbinjie | Hits:

[SCM] sd-spi

Description: SD卡切换到SPI模式的工作流程，必须遵守这个流程-SD card SPI mode switch to the work flow, we must comply with the flow
Platform: | Size: 1024 | Author: lsc | Hits:

[Other] sd_IP

Description: SD card controller can just read data using 1 bit SD mode. I have written this core for NIOS2 CPU, Cyclone, but I think it can works with other FPGA or CPLD. Better case for this core is SD clock = 20 MHz and CPU clock = 100 MHz (or in the ratio 1:5). If you have a wish you can achieve this core. Good luck-SD card controller can just read data using 1 bit SD mode.I have written this core for NIOS2 CPU, Cyclone, but I think it can workswith other FPGA or CPLD. Better case for this core is SD clock = 20 MHz andCPU clock = 100 MHz (or in the ratio 1:5). If you have a wish you can achieve this core.Good luck
Platform: | Size: 8192 | Author: tuya | Hits:

[VHDL-FPGA-Verilog] DE1_SD_Card_Audio

Description: SD卡操作模块，一个简单的sd卡使用实例-SD card operation module, a simple example of the use of sd cards
Platform: | Size: 1041408 | Author: 刘勇 | Hits:

[VHDL-FPGA-Verilog] main

Description: altera de2 sd 卡源程序。调试成功的-altera de2 sd card source. Debugging success
Platform: | Size: 1024 | Author: 娟娟 | Hits:

[VHDL-FPGA-Verilog] DE1_SD_Card_Audio

Description: 基于NIOS II的SD CARD MUSIC PLAYER源码，包括硬件SOPC-NIOS II based on the SD CARD MUSIC PLAYER source, including hardware SOPC
Platform: | Size: 1844224 | Author: Sgj | Hits:

[VHDL-FPGA-Verilog] sd_reader

Description: SD卡读卡器模块的VHDL及软件驱动代码，可作为外设挂接在Avalon总线上。支持以SD模式、4线模式读取。在24MHz时钟驱动下读取速率可达8MByte/s-SD card reader module and software drivers VHDL code, can be articulated as a peripheral bus in Avalon. To support the SD model, 4-wire mode read. Driven by the 24MHz clock rate up to read 8MByte/s
Platform: | Size: 18432 | Author: ctqy | Hits:

[VHDL-FPGA-Verilog] DE2_SD_Card_Audio

Description: DE2上SD卡的读写代码，应用环境quartus -DE2 on SD card to read and write code
Platform: | Size: 12817408 | Author: 向亚飞 | Hits:

[VHDL-FPGA-Verilog] hex2rom_0241_Win32

Description: This SPI-mode SD Card controller is a free SOPC Builder component that can be used in any SOPC Builder system. The included example design runs on the Nios II Embedded Evaluation Kit, Cyclone III edition (NEEK).-This SPI-mode SD Card controller is a free SOPC Builder component that can be used in any SOPC Builder system. The included example design runs on the Nios II Embedded Evaluation Kit, Cyclone III edition (NEEK).
Platform: | Size: 96256 | Author: zhangdongqing | Hits:

[VHDL-FPGA-Verilog] C20_SD

Description: FPGA应用如sd卡控制，led控制，vga音频控制-Sd card FPGA applications such as control, led control, vga audio control
Platform: | Size: 1172480 | Author: 钟灶生 | Hits:

[VHDL-FPGA-Verilog] send_cmd

Description: SD card SDIO module send command and read response
Platform: | Size: 1024 | Author: kantengri | Hits:

[SCSI-ASPI] spi_Master

Description: 实现了对SD卡的SPI方式下读写操作，已经测试了，可以直接用-The realization of the SD card to read and write SPI operation mode has been tested, can be directly used
Platform: | Size: 2116608 | Author: 张立涛 | Hits:

[VHDL-FPGA-Verilog] SDCard_Controller

Description: SD卡控制器IP. 兼容SD卡协议2.0。与wishbone bus 接口，方便与其他IP连接使用。 -SD Card Controller IP. Compatible with SD Card Agreement 2.0. With the wishbone bus interface to facilitate the use of other IP connections.
Platform: | Size: 24576 | Author: xiafei | Hits:

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[ARM-PowerPC-ColdFire-MIPS] 第1章－SD卡读写模块

[VHDL-FPGA-Verilog] SDmmcfpgaconfig.tar

[SCM] SDcard_Driver

[Other Embeded program] smartcard_vhdl

[VHDL-FPGA-Verilog] FPGA-SD-COMMUNICATION

[SCM] sd-spi

[Other] sd_IP

[VHDL-FPGA-Verilog] DE1_SD_Card_Audio

[VHDL-FPGA-Verilog] main

[VHDL-FPGA-Verilog] DE1_SD_Card_Audio

[VHDL-FPGA-Verilog] sd_reader

[VHDL-FPGA-Verilog] DE2_SD_Card_Audio

[VHDL-FPGA-Verilog] hex2rom_0241_Win32

[VHDL-FPGA-Verilog] C20_SD

[VHDL-FPGA-Verilog] send_cmd

[SCSI-ASPI] spi_Master

[VHDL-FPGA-Verilog] SDCard_Controller

[VHDL-FPGA-Verilog] SD_verilog

[VHDL-FPGA-Verilog] DE1_SD_Card_Audio

[VHDL-FPGA-Verilog] SD-card-controller-used--FPGA

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