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[Other resource] 标准SDR SDRAM控制器参考设计_verilog_lattice DL : 0: 标准SDR SDRAM控制器参考设计，Lattice提供的verilog源代码-standard SDR SDRAM controller reference design, the Lattice Verilog source code
Update : 2008-10-13 Size : 199.51kb Publisher : 陈旭
[Other resource] ref-sdr-sdram-vhdl DL : 0: 标准SDR SDRAM控制器参考设计_verilog_lattice\\sdr_ctrl.v
Update : 2008-10-13 Size : 758.44kb Publisher : 王廷龙
[Other resource] SDR DL : 0: 软件无线电SDR实现GPS的代码,软件无线电SDR实现GPS的代码
Update : 2008-10-13 Size : 80.7kb Publisher : liu
[SourceCode] SDR-SDRAM-vhdl DL : 0: SDR-SDRAM-vhdl单个SDRAM的控制，通过它可以学习了解SDRAM的时序等，很有帮助哦！
Update : 2010-12-02 Size : 700.95kb Publisher : zsy5460
[VHDL-FPGA-Verilog] 标准SDR SDRAM控制器参考设计_verilog_lattice DL : 0: 标准SDR SDRAM控制器参考设计，Lattice提供的verilog源代码-standard SDR SDRAM controller reference design, the Lattice Verilog source code
Update : 2025-02-17 Size : 199kb Publisher : 陈旭
[VHDL-FPGA-Verilog] sdr sdram controller DL : 0: ALTERA sdram vhdl与verilog参考设计-Altera SDRAM VHDL and Verilog reference design
Update : 2025-02-17 Size : 2.34mb Publisher : 陈东平
[VHDL-FPGA-Verilog] ref-sdr-sdram-verilog DL : 0: 本代码是用VRILOG语言写的SDRAM的控制器的标准代码,供开发SARM参考.-this code is used to write the language VRILOG SDRAM controller standard code for the development of SARM reference.
Update : 2025-02-17 Size : 758kb Publisher : 汪旭
[Documents] SDR4G DL : 0: 浅谈软件无线电技术SDR及其在未来移动通信4G中的应用-SDR software radio technology and the future of mobile communications in the application of 4G
Update : 2025-02-17 Size : 80kb Publisher : 冯嘉兴
[source in ebook] soft_radio_init DL : 0: 软件无线电SDR的仿真，使用matlab仿真。-Software Radio SDR simulation using Matlab simulation.
Update : 2025-02-17 Size : 197kb Publisher : 春晓
[Other] SDR DL : 0: 软件无线电经典英文书籍《Autonomous Software-defined Radio Receivers for Deep Space Applications》-software radio classic English books "Autonomous Software-defin ed Radio Receivers for Deep Space Applications "
Update : 2025-02-17 Size : 2.95mb Publisher : 王克军
[MiddleWare] leon3-altera-ep2s60-sdr DL : 0: ahb sdram interface.arm cpu series,include controller
Update : 2025-02-17 Size : 96kb Publisher :
[VHDL-FPGA-Verilog] ref-sdr-sdram-vhdl DL : 0: 标准SDR SDRAM控制器参考设计_verilog_lattice\sdr_ctrl.v-Standard SDR SDRAM Controller Reference Design _verilog_latticesdr_ctrl.v
Update : 2025-02-17 Size : 758kb Publisher : 王廷龙
[VHDL-FPGA-Verilog] ref-sdr-sdram-vhdl DL : 0: 基于VHDL编写的SDR-SDRAM控制器的编程，目前是业界常用的RAM控制器-VHDL prepared based on the SDR-SDRAM controller programming, is now commonly used in industry RAM controller
Update : 2025-02-17 Size : 990kb Publisher : wfs
[Communication-Mobile] SDR DL : 0: Its a simple SDR to change modulation schemes
Update : 2025-02-17 Size : 14kb Publisher : Saad
[VHDL-FPGA-Verilog] SDR DL : 0: FPGA based implementation of a SDR - codes in Verilog HDL for the processor and control.-FPGA based implementation of a SDR- codes in Verilog HDL for the processor and control.
Update : 2025-02-17 Size : 6kb Publisher : Sirisha
[Other] SDR-SDRAM-ctl1 DL : 0: SDR SDRAM控制器，FPGA vhdl代码-SDR SDRAM Controller
Update : 2025-02-17 Size : 702kb Publisher :
[GPS develop] gps-sdr-gps-sdr-271efd1 DL : 0: The GPS-SDR is a highly modular, multithreaded enabled, C++ application. The software is a GPS L1 C/A code receiver with a fast acquisition/weak signal capability.
Update : 2025-02-17 Size : 3.86mb Publisher : Zhaba
[VHDL-FPGA-Verilog] sdr-sdram-(verilog) DL : 0: Altera的SDR SDRAM模型，verilog实现，带说明书文件以及仿真文件、SDRAM原型文件。-Altera' s SDR SDRAM model, verilog implementation, with manual files and simulation files, SDRAM prototype file.
Update : 2025-02-17 Size : 759kb Publisher : 左左
[VHDL-FPGA-Verilog] 标准SDR SDRAM控制器参考设计，Lattice提供 DL : 0: 说明： SDR SDRAM 控制器来自lattice 已经分析代码可用!大家可以参考修改，形成自己的实例(Description: SDR SDRAM controller from lattice has been analyzed code available, we can refer to modify, to form their own examples)
Update : 2025-02-17 Size : 17kb Publisher : modelsim
[Other] gnss sdr DL : 0: Gnss SDR details in c and c++
Update : 2025-02-17 Size : 211kb Publisher : saurabhcancerian

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