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[VHDL-FPGA-Verilog] 8051的内核(vhdl)

Description: 最完整最实用的8051的软核，用VHDL语言编写全部原代码，并有详细的注释介绍，对开发增强型多功能单片机或RSIC单片机内核和单片机SOC应用非常有参考价值-most complete most practical of the 8051 soft-core, with all the preparation VHDL source code, and the Notes for a detailed briefing on the development of an enhanced multi-purpose microcontroller core or RSIC microcontroller and microprocessor applications SOC very valuable reference
Platform: | Size: 212992 | Author: czy | Hits:

[Program doc] TheResearchAndIPDesignOfSMBusBasedSmartBattery

Description: 本文研究了SMBus 规范，介绍了典型的基于片上系统（SoC）设计的知识产权核（IP）实现，采用自顶向下 (Top-down)的集成电路设计方法完成了设计，并架构了基于总线功能模型(BFM)的验证平台 完成功能仿真，顺利完成了逻辑综合和时序仿真。FPGA 验证和投片后测试均表明设计具有 良好的性能。-This paper studies the SMBus specification, based on the introduction of the typical system-on-chip (SoC) intellectual property core design (IP) implementation, using top-down (Top-down) of the integrated circuit design methods achieve a design and architecture based on the total Line functional model (BFM) achieve functional verification platform for simulation, successfully completed a logic synthesis and timing simulation. FPGA silicon validation and post-tests show that the design has good performance.
Platform: | Size: 256000 | Author: caorui | Hits:

[VHDL-FPGA-Verilog] FPGA_DESIGNED

Description: 曾经的硕士论文，基于FPGA的8051的soc核研究，用FPGA实现的51核，对FPGA的学习很有帮助-Have master' s thesis, based on the FPGA of the soc of the 8051 nuclear research, with FPGA to achieve the 51 nuclear, helpful for learning FPGA
Platform: | Size: 5193728 | Author: 菠萝 | Hits:

[VHDL-FPGA-Verilog] Eat_beans_on_the_8086_games

Description: 本项目在FPGA上生成8086指令兼容的软核以及外设，并在此基础上跑通pc机上古老但是仍然有趣的吃豆子PACMAN游戏， 作为本科微机原理课程的实验。 通过本项目，学生可以学习到8086的基本结构， 在TurboC下如何进行嵌入式C语言编程，汇编语言， 计算机组成等基本原理， 有独立设计基于8086的SOC软硬件的能力。-The project generated in the FPGA on the 8086 Directive, as well as soft-core-compatible peripherals, and on this basis pc machine running the old pass is still fun to eat but beans PACMAN game, as a principle of undergraduate courses in computer experiments. Through the project, students learn the basic structure of 8086, in TurboC how embedded C language programming, assembly language, computer components, such as the basic principles, independent of the SOC design is based on the 8086 hardware and software capabilities.
Platform: | Size: 6281216 | Author: xiaoxu | Hits:

[VHDL-FPGA-Verilog] I2C

Description: I2C主机端模块 具有avalon-MT总线接口 可挂载在Altera soc系统之上 使NiosII处理器具备I2C通信能力 模块由Verilog HDL编写 并经Cyclone II FPGA测试-I2C master modul which has a avalon-MT interface that can be attached to Altera SOC system. It provides NiosII I2C communication capability . This module is written with Verilog HDL and has been tested on a Cyclone II FPGA
Platform: | Size: 6144 | Author: magic_andy | Hits:

[VHDL-FPGA-Verilog] FPGA_SOPC

Description: FPGA/SOPC开发快速入门教程，FPGA 在复杂逻辑电路以及数字信号处理领域中扮演者越来越重要的角色，SOC（片上系统）以其低 功耗，高性能，低成本，高可靠性等优点成为嵌入式系统的发展趋势。作-QUARTUS II platform based on the VHDL language elevator system control procedures.
Platform: | Size: 1512448 | Author: 蔡秀雄 | Hits:

[Other] vhdl

Description: 如今FPGA 在复杂逻辑电路以及数字信号处理领域中扮演着越来越重要的角 色，SOC（片上系统）以其低功耗、高性能、低成本、高可靠性等优点成为嵌入 式系统的发展趋势-Today, in a complex FPGA logic and digital signal processing plays an increasingly important role, SOC (system on chip) with its low-power, high performance, low cost, high reliability, etc. to become the development trend of embedded systems
Platform: | Size: 398336 | Author: lcszhl | Hits:

[VHDL-FPGA-Verilog] XC4VLX60MB_Lab3_RS232_ISE91

Description: FPGA design, In addition to logic design, the future also can be SOC (System On Chip) approach to achieve a future A complete design system, so XC4VLX60 the board design includes RS232 and LCD surrounding the design, this experiment will Super terminal RS232 and PC connectivity for asynchronous data transmission, as RS232 verification and practice.-FPGA design, In addition to logic design, the future also can be SOC (System On Chip) approach to achieve a future A complete design system, so XC4VLX60 the board design includes RS232 and LCD surrounding the design, this experiment will Super terminal RS232 and PC connectivity for asynchronous data transmission, as RS232 verification and practice.
Platform: | Size: 498688 | Author: vkiy | Hits:

[VHDL-FPGA-Verilog] embeddeedsystermSOPCdesignbasedonFPGA

Description: 介绍了SOC发展状况，并针对 ahera公司 FPGA的解决方案 SOPC进行重点分析 ，重点介绍和分析处理器的关键技术和设计流程以及相关软件。 -Describes the development of SOC, and for the FPGA solution ahera SOPC company to focus on analysis, highlights and analysis of the key processor technology and design processes and related software.
Platform: | Size: 205824 | Author: 裴蕾 | Hits:

[VHDL-FPGA-Verilog] Camera_Interface_Verilog

Description: 该源代码包是基于片上系统的摄像头接口的Verilog语言程序，它包括以下5部分：RTL源代码，测试平台，软件仿真C代码，FPGA综合时的sdc和ucf文件，说明文档。-This source code package is the camera interface module based on the SoC use Verilog language. It has the following 5 parts: RTL code, testbench, software simulating C code, the sdc and ucf files for the FPGA synthiese, help document.
Platform: | Size: 348160 | Author: jinjin | Hits:

[VHDL-FPGA-Verilog] wp-01157-embedded-soc_CN

Description: Altera 在新出现的SoC FPGA 上的策略考虑-Altera in the emerging SoC FPGA on the strategic considerations
Platform: | Size: 241664 | Author: adin | Hits:

[Other] FPGAdevelopment

Description: FPGA 是可编程芯片，因此FPGA 的设计方法包括硬件设计和软件设计两部分。硬件包括FPGA 芯片电路、 存储器、输入输出接口电路以及其他设备，软件即是相应的HDL 程序以及最新才流行的嵌入式C 程序。 目前微电子技术已经发展到SOC 阶段，即集成系统(Integrated System) 阶段，相对于集成电路(IC) 的设 计思想有着革命性的变化。SOC 是一个复杂的系统，它将一个完整产品的功能集成在一个芯片上，包括核心处 理器、存储单元、硬件加速单元以及众多的外部设备接口等，具有设计周期长、实现成本高等特点，因此其设 计方法必然是自顶向下的从系统级到功能模块的软、硬件协同设计，达到软、硬件的无缝结合。 这么庞大的工作量显然超出了单个工程师的能力，因此需要按照层次化、结构化的设计方法来实施。首先 由总设计师将整个软件开发任务划分为若干个可操作的模块，并对其接口和资源进行评估，编制出相应的行为 或结构模型，再将其分配给下一层的设计师。这就允许多个设计者同时设计一个硬件系统中的不同模块，并为 自己所设计的模块负责；然后由上层设计师对下层模块进行功能验证。-FPGA is a programmable chip, so the FPGA design method including hardware design and software design of two parts.The hardware includes the FPGA chip circuit, Memory, input/output interface circuit, and other equipment, software is the corresponding HDL programs as well as the latest popular embedded C program. The microelectronics technology has developed to the stage of SOC, namely Integrated System (Integrated System) phase, compared with the Integrated circuit (IC) Thought has a revolutionary change.SOC is a complicated system, it will be a complete product function integrated on a chip, including the core Bedding, storage unit, hardware acceleration unit as well as many peripheral interface, etc., has a long design cycle, make the cost is high, so the set Meter method is necessarily top-down the system level to the function modules of collaborative design of software and hardware, to achieve a seamless combination of hardware and software. So huge workload obviously beyond
Platform: | Size: 6734848 | Author: xw | Hits:

[VHDL-FPGA-Verilog] mipsx2

Description: 基于FPGA的SOC设计与功能测试，利用mips指令集编写的soc片上系统，以及功能验证- SOC design and FPGA-based functional test, use mips instruction set written soc system on a chip, and functional verification
Platform: | Size: 1508352 | Author: wuqi | Hits:

[Embeded Linux] Cyclone V HPP demonstration

Description: C source code that exemplifies the use of the Cyclone V FPGA on a development board. Function exemplified: - the communication between the HPP and the FPGA - using the audio output - using LEDs - using switches - using 7 segment display
Platform: | Size: 12241 | Author: serby2000 | Hits:

[VHDL-FPGA-Verilog] Zet-1.3.1

Description: 在单片FPGA上实现九十年代初期PC，可安装Windows3.1及其他DOS系统。SOC中包含以80286(cpu),中断控制器,显示控制器(VGA),声音控制器,PS2(鼠标，键盘)等。是了解计算机历史变迁及学习SOC设计的重要资料！(ZET aims to implement an early 90`s PC on FPGA.Which include a 80286(cpu),interrupt controller,display card(VGA),sound card,PS2 interface .)
Platform: | Size: 2487296 | Author: VectorIII | Hits:

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