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Description: 这是一个关于NIOS2嵌入式CPU,尜加UART的技术文档,对天SOPC BUILDER认识的人一看就明白啦.-on NIOS2 embedded CPU, UART chung increase the technical documentation, BUILDER days SOPC right people who know at first understood.
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Size: 173250 |
Author: dddd |
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Description: 本书主要介绍Altera公司的软核CPU——nios和采用该CPU进行嵌入式系统设计的流程与方法。并以此为着眼点，介绍Altera的片上可编程系统SOPC的设计原理与实践技术，引领读者在低投入的情况下，较快地进入片上系统soc的殿堂。
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Size: 8743307 |
Author: 阿康 |
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Description: 基于fpga和sopc的用VHDL语言编写的EDA的32位Nios CPU嵌入式系统软硬件设计
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Size: 927142 |
Author: 多幅撒 |
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Description: 基于fpga和sopc的用VHDL语言编写的EDA的32位Nios CPU嵌入式系统及其DMA设计俄罗斯方块游戏机
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Size: 2194210 |
Author: 多幅撒 |
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Description: 本手册详细介绍了关于NIOS ii软核CPU各个模块及其功能，对SOPC开发有很大的参考价值。
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Size: 1495743 |
Author: 祝闯 |
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Description: 这是一个关于NIOS2嵌入式CPU,尜加UART的技术文档,对天SOPC BUILDER认识的人一看就明白啦.-on NIOS2 embedded CPU, UART chung increase the technical documentation, BUILDER days SOPC right people who know at first understood.
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Size: 173056 |
Author: dddd |
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Description: 本书主要介绍Altera公司的软核CPU——nios和采用该CPU进行嵌入式系统设计的流程与方法。并以此为着眼点，介绍Altera的片上可编程系统SOPC的设计原理与实践技术，引领读者在低投入的情况下，较快地进入片上系统soc的殿堂。
-This book introduces the Altera s soft-core CPU- nios and the use of the CPU for embedded system design process and methods. As the focus on Altera s programmable system chip SOPC design principle and practice of technology, leading the reader in the case of low-input, fast access to system-on-chip soc hall.
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Size: 8742912 |
Author: 阿康 |
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Description: 基于fpga和sopc的用VHDL语言编写的EDA的32位Nios CPU嵌入式系统软硬件设计-FPGA and SOPC based on the use of VHDL language EDA 32-bit Nios CPU embedded system software and hardware design
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Size: 926720 |
Author: 多幅撒 |
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Description: 基于fpga和sopc的用VHDL语言编写的EDA的32位Nios CPU嵌入式系统及其DMA设计俄罗斯方块游戏机-FPGA and SOPC based on the use of VHDL language EDA 32-bit Nios CPU and the DMA design of embedded systems Tetris game
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Size: 2194432 |
Author: 多幅撒 |
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Description: 本手册详细介绍了关于NIOS ii软核CPU各个模块及其功能，对SOPC开发有很大的参考价值。-This manual details on the NIOS ii soft-core CPU each module and its functions, the development of SOPC has great reference value.
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Size: 1495040 |
Author: 祝闯 |
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Description: 采用nios2的嵌入式数字钟的设计与实现，首先使用quartus2中的sopc builder设计CPU内核，然后在nios2中庸C语言来实现数字钟的功能-The use of embedded digital clock nios2 the design and realization of the first to use quartus2 in sopc builder design CPU core, and then nios2 Zhongyong C language to realize the function of digital clock
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Size: 66560 |
Author: 齐磊 |
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Description: SOPC Builder创建的CPU，能够满足简单的VHDL软件仿真-SOPC Builder to create the CPU, to meet the simple VHDL software simulation
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Size: 4346880 |
Author: roger |
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Description: SOPC Builder创建的CPU，能够满足简单的VHDL软件仿真-SOPC Builder to create the CPU, to meet the simple VHDL software simulation
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Size: 91136 |
Author: roger |
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Description: Quartus, Sopc Builder搭建的CPU，通过NIOS控制LCD。工程文件。-Quartus, Sopc Builder to build the CPU, through the NIOS control LCD. Engineering documents.
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Size: 2997248 |
Author: 小杨 |
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Description: nios cpu test code this code was generated by altera tool automatically. You can obtain this code from the SOPC builder
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Size: 3072 |
Author: dusung |
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Description: 本文介绍了一种基于NIOS II软核处理器实现对LCD-LQ057Q3DC02控制的新方法。在设计中利用FPGA的Altera的SOPC Builder定制NIOS II软核处理器及其与显示功能相关的“软” 硬件模块来协同实现显示控制的软硬件设计。利用SOPC技术，将NIOS II CPU和LCD控制器放在同一片FPGA中，解决了通常情况下必须使用LCD 控制专用芯片才能解决LCD显示的问题。-This article describes an approach based on NIOS II soft-core processors to achieve control of the LCD-LQ057Q3DC02 new method. The use of FPGA in the design of Altera' s SOPC Builder Custom NIOS II soft-core processor and its display-related " soft" hardware modules to achieve synergistic display control hardware and software design. Using SOPC technology, NIOS II CPU and LCD controller on the same FPGA, the solution to the normally must use the LCD control ASIC in order to solve the problem of LCD display.
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Size: 67584 |
Author: shiquan |
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Description: sopc 中的cpu软核，可以配置成soc,成为片上可编程系统-sopc in soft-core cpu, can be configured into a soc, as a programmable system chip
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Size: 200704 |
Author: wang |
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Description: 本设计运用了基于 Nios II 嵌入式处理器的 SOPC 技术。系统以 ALTERA 公司的 Cyclone II 系列 FPGA 为数字平台，将微处理器、Avalon 总线、LED 点阵扫描控制器、存储器和人机接口控制器等硬件设备集中在一片 FPGA 上，利用片内硬件来实现 LED 点阵的带地址扫描，降低系统总功耗和简化 CPU 编程的同时，提高了系统的精确度、稳定性和抗干扰性能。-This design used the Nios II embedded processor based on SOPC technology. System to ALTERA' s Cyclone II series FPGA for digital platforms, microprocessors, Avalon bus, LED dot matrix scan controller, memory and man-machine interface controller and other hardware devices focused on an FPGA, using on-chip hardware to achieve the LED dot-matrix band address scan, reducing the total system CPU power consumption and simplify programming while increasing the system' s accuracy, stability and anti-jamming performance.
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Size: 968704 |
Author: 叶子 |
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Description: SOC（System On a Chip）称为片上系统，它是指将一个完整产品的功能集成在一个芯片上或芯片组上。SOC中可以包括微处理器CPU、数字信号处理器DSP、存储器（ROM、RAM、Flash等）、总线和总线控制器、外围设备接口等，还可以包括数模混合电路（放大器、比较器、A/D和D/A转换器、锁相环等），甚至延拓到传感器、微机电和微光电单元。 -SOC (System On a Chip) is called on-chip system, which refers to a complete product functionality in a single chip or chipset. SOC can be included in the microprocessor CPU, digital signal processor DSP, memory (ROM, RAM, Flash, etc.), bus and bus controller, the external device interface, etc., may also include mixed analog-digital circuits (amplifiers, comparators, A/D and D/A converters, phase-locked loop, etc.), and even extension to the sensor, MEMS and micro-optical elements.
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Size: 5405696 |
Author: 林崇坤 |
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Description: VHDL编写的CPU源码，可嵌入SOPC系统开发-Prepared by the VHDL the CPU source, embeddable SOPC system development
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Size: 315392 |
Author: wrk |
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