Description: 此为VHDL的SPI通信代码,全部在一个压缩包中,请仔细阅读后再使用.-this as VHDL code SPI communication, all in a compressed package, please read carefully before use. Platform: |
Size: 3875 |
Author:藏瑞 |
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Description: 此为VHDL的SPI通信代码,全部在一个压缩包中,请仔细阅读后再使用.-this as VHDL code SPI communication, all in a compressed package, please read carefully before use. Platform: |
Size: 4096 |
Author:藏瑞 |
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Description: SPI串口的内核实现(vhdl),可以用qII等软件直接加到FPGA或者CPLD里面.-the SPI Serial Kernel (vhdl) can be used directly qII software foisted CPLD or FPGA inside. Platform: |
Size: 13312 |
Author:efly |
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Description: VHDL实现SPI功能源代码
-- The SPI bus is a 3 wire bus that in effect links a serial shift
-- register between the "master" and the "slave". Typically both the
-- master and slave have an 8 bit shift register so the combined
-- register is 16 bits. When an SPI transfer takes place, the master and
-- slave shift their shift registers 8 bits and thus exchange their 8
-- bit register values.-SPI realize the functional VHDL source code The SPI bus is a 3 wire bus that in effect links a serial shift register between the Platform: |
Size: 65536 |
Author:阿飞 |
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Description: SPI(serial port interface)的Verilog/VHDL源代碼,已模擬並驗證。-SPI (serial port interface) of the Verilog/VHDL source code, has been simulated and verified. Platform: |
Size: 116736 |
Author:hcjian |
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Description: spi总线控制器,包含vhdl和verilog两种代码方式来实现。-spi bus controller, including VHDL and Verilog code in two ways to achieve. Platform: |
Size: 13312 |
Author:wangdong |
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Description: SPI接口的vhdl代码,可以实现与单片机的spi通信,完整的工程-SPI interface of the VHDL code can be achieved with SCM spi communication, complete works Platform: |
Size: 4096 |
Author:wanyou2345 |
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Description: SPI接口VHDL代码,内有说明,很详细.-SPI interface VHDL code, which has made it clear that, in great detail. Platform: |
Size: 180224 |
Author:dushibiao |
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Description: 本spi参数化通讯模块是一个支持SPI串行通信协议从协议的SPI从接口。可通过改变参数设置传输的位数,由外部控制器给定脉冲控制传输。-The parameters of spi communication module is a support SPI serial communication protocol from the agreement from the SPI interface. By changing the parameter settings can be transmitted over the median, given by an external controller to control transmission pulse. Platform: |
Size: 37888 |
Author: |
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Description: SPI serial flash ROM的verilog源代码, 针对winbond W25x16,已经经过逻辑验证,并实际用在芯片设计中,作为一个模块,正常工作.-SPI serial flash ROM in verilog source code for winbond W25x16, logic has been verified, and actually used in chip design, as a module to work. Platform: |
Size: 8192 |
Author:Jerd Hu |
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Description: 用VHDL编写的一个SPI主机程序,SPI模块采用最常用的模式0方式(即CPOL=0,CPHA=0)通信。文件内含测试文档,已在Modelsim6.5上测试通过,可在FPGA上直接调用。-A SPI Master code edited by VHDL language,the SPI modul use 0 MODE(i.e CPOL=0,CPHA=0)to communicate with the SPI Slave.and there is a testbench in the file folder,which has been tested in Modelsim6.5,you can use it in FPGA directly. Platform: |
Size: 3072 |
Author:骏 |
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Description: 此为VHDL的SPI通信代码,全部部在一个压缩包中,请仔细阅读后再使用.
-This is the VHDL SPI communication code, all the Ministry in a compressed package, please read carefully before use. Platform: |
Size: 4096 |
Author:mx |
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