Search - SPI FPGA

[Com Port] fpga

Description: 这是一个用C语言写的SPI读写FPGA的典型代码，具有一定的参照开发价值-This is a C language reader wrote SPI typical FPGA code has some reference value for development
Platform: | Size: 2048 | Author: 廖月旺 | Hits:

[VHDL-FPGA-Verilog] SPI_verilogHDL

Description: 本原码是基于Verilog HDL语言编写的，实现了SPI接口设计，可以应用于FPGA,实现SPI协议的接口设计.在MAXII编译成功,用Modelsim SE 6仿真成功.-primitive code is based on Verilog HDL language, and achieving the SPI interface design, FPGA can be used to achieve agreement SPI interface design. MAXII success in the compiler, Modelsim SE with six successful simulation.
Platform: | Size: 1024 | Author: jevidyang | Hits:

[VHDL-FPGA-Verilog] fpga_spi

Description: 文件中包含有用fpga实现isp接口的源码，以及和处理器接口，测试时处理器是ARM7。-document contains useful fpga achieve isp Interface source, as well as the processor interface, testing is ARM7 processor.
Platform: | Size: 2164736 | Author: 张创贞 | Hits:

[Linux-Unix] lcdspi

Description: Samsung LCD驱动（SPI接口）-Samsung LCD Driver (SPI)
Platform: | Size: 3072 | Author: 凌畅宇 | Hits:

[VHDL-FPGA-Verilog] SPI_VHDL

Description: SPI串口的内核实现（vhdl）,可以用qII等软件直接加到FPGA或者CPLD里面.-the SPI Serial Kernel (vhdl) can be used directly qII software foisted CPLD or FPGA inside.
Platform: | Size: 13312 | Author: efly | Hits:

[ARM-PowerPC-ColdFire-MIPS] M_FPGALoading

Description: 利用ARM的GPIO和SPI总线进行FPGA的被动串行配置,加载速度可以达到200KBytes/Sec.-The use of ARM
Platform: | Size: 301056 | Author: 周丹 | Hits:

[DSP program] DEC2812_spi

Description: TMS320F2812的spi口调试程序，经测试可以正确完成收发功能-TMS320F2812 the spi port debugger, have been tested to send and receive functions can be correctly
Platform: | Size: 264192 | Author: 魏宝节 | Hits:

[Embeded-SCM Develop] vspi_VHDL

Description: FPGA/CPLD VHDL语言实现SPI，拥有两种模式，FPGA/CPLD即可工作在主机模式，又可工作在从机模式 -FPGA/CPLD VHDL language SPI, have the two models, FPGA/CPLD can work in host mode, but also work in slave mode
Platform: | Size: 248832 | Author: 张焱 | Hits:

[Driver Develop] FPGA_SPI

Description: FPGA实现SPI的内核驱动 FPGA实现SPI的内核驱动-FPGA realization of the kernel SPI driver FPGA realization of the kernel SPI driver FPGA realization of the kernel SPI driver
Platform: | Size: 308224 | Author: | Hits:

[VHDL-FPGA-Verilog] spi

Description: spi协议的FPGA实现(Verlog).-spi protocol FPGA realize (Verlog).
Platform: | Size: 1024 | Author: 徐凯 | Hits:

[VHDL-FPGA-Verilog] spi_master

Description: 基于CPLD/FPGA的SPI控制的IP核的实现spi_master-Based on CPLD/FPGA to control the SPI realize the IP core spi_master
Platform: | Size: 1024 | Author: linsky | Hits:

[VHDL-FPGA-Verilog] 080513154000

Description: 并行转串行的VHDL描述：基于FPGA的SPI发送模块的设计-Parallel to serial VHDL description: Based on the FPGA to send the SPI module
Platform: | Size: 95232 | Author: yaoqinghua | Hits:

[Compress-Decompress algrithms] masterspiverilog

Description: spi总线控制器的fpga实现 verilog源代码及测试-spi bus controller realize the FPGA Verilog source code and test
Platform: | Size: 180224 | Author: sang | Hits:

[VHDL-FPGA-Verilog] config_dac

Description: Verilog实现 spi接口的FPGA实现通过仿真，修改后即可应用-Verilog realize spi interface FPGA to achieve through the simulation, the application can be modified
Platform: | Size: 274432 | Author: 强冰 | Hits:

[VHDL-FPGA-Verilog] spi

Description: spi的FPGA驱动用于嵌入式开发系统-spi the FPGA-driven development for embedded systems
Platform: | Size: 290816 | Author: 田辉 | Hits:

[Embeded-SCM Develop] AIC

Description: 使用FPGA/CPLD设置语音AD、DA转换芯片AIC23，FPGA/CPLD系统时钟为24.576MHz 1、AIC系统时钟为12.288MHz，SPI时钟为6.144MHz 2、AIC处于主控模式 3、input bit length 16bit output bit length 16bit MSB first 4、帧同步在96KHz-The use of FPGA/CPLD set voice AD, DA conversion chip AIC23, FPGA/CPLD system clock for the 24.576MHz 1, AIC system clock is 12.288MHz, SPI clock is 6.144MHz 2, AIC is in master mode 3, input bit length 16bit output bit length 16bit MSB first 4, frame synchronization at 96KHz
Platform: | Size: 2048 | Author: 张键 | Hits:

[VHDL-FPGA-Verilog] SPI

Description: 经典spi IP 核心 FPGA是实现有说明文档-spi IP based on fpga
Platform: | Size: 49152 | Author: wuyou | Hits:

[VHDL-FPGA-Verilog] SPI-Flash

Description: 基于Xilinx-SPartan 3an FPGA 的与单片机 SPI 接口参考设计-SPI interface base of Xilinx Spartan 3AN kid
Platform: | Size: 2592768 | Author: saladin | Hits:

[VHDL-FPGA-Verilog] FPGA-realise-the-SPI-code

Description: 用verilog实现的SPI程序，还在modelsim中编写了testbetch文件，非常适合初学者做SPI实验，做一遍包括quartus应用及modelsim仿真都会了-Implementation of SPI with verilog program, also write the testbetch modelsim file, ideal for beginners to do SPI experiment, do it again, including quartus and modelsim simulation applications are the
Platform: | Size: 301056 | Author: 万鹏 | Hits:

[Other] spi-fpga-master

Description: SPI Master code for use in fpga programming. the code model spi communication protocol.
Platform: | Size: 18432 | Author: xeee | Hits:

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[Com Port] fpga

[VHDL-FPGA-Verilog] SPI_verilogHDL

[VHDL-FPGA-Verilog] fpga_spi

[Linux-Unix] lcdspi

[VHDL-FPGA-Verilog] SPI_VHDL

[ARM-PowerPC-ColdFire-MIPS] M_FPGALoading

[DSP program] DEC2812_spi

[Embeded-SCM Develop] vspi_VHDL

[Driver Develop] FPGA_SPI

[VHDL-FPGA-Verilog] spi

[VHDL-FPGA-Verilog] spi_master

[VHDL-FPGA-Verilog] 080513154000

[Compress-Decompress algrithms] masterspiverilog

[VHDL-FPGA-Verilog] config_dac

[VHDL-FPGA-Verilog] spi

[Embeded-SCM Develop] AIC

[VHDL-FPGA-Verilog] SPI

[VHDL-FPGA-Verilog] SPI-Flash

[VHDL-FPGA-Verilog] FPGA-realise-the-SPI-code

[Other] spi-fpga-master

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