Search - SREC FILE

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[Other resource] leon3-altera-ep2s60-ddr DL : 0: This leon3 design is tailored to the Altera NiosII Startix2 Development board, with 16-bit DDR SDRAM and 2 Mbyte of SSRAM. As of this time, the DDR interface only works up to 120 MHz. At 130, DDR data can be read but not written. NOTE: the test bench cannot be simulated with DDR enabled because the Altera pads do not have the correct delay models. * How to program the flash prom with a FPGA programming file 1. Create a hex file of the programming file with Quartus. 2. Convert it to srecord and adjust the load address: objcopy --adjust-vma=0x800000 output_file.hexout -O srec fpga.srec 3. Program the flash memory using grmon: flash erase 0x800000 0xb00000 flash load fpga.srec
Date : 2008-10-13 Size : 112.09kb User : king.xia
[VHDL-FPGA-Verilog] leon3-altera-ep2s60-ddr DL : 0: This leon3 design is tailored to the Altera NiosII Startix2 Development board, with 16-bit DDR SDRAM and 2 Mbyte of SSRAM. As of this time, the DDR interface only works up to 120 MHz. At 130, DDR data can be read but not written. NOTE: the test bench cannot be simulated with DDR enabled because the Altera pads do not have the correct delay models. * How to program the flash prom with a FPGA programming file 1. Create a hex file of the programming file with Quartus. 2. Convert it to srecord and adjust the load address: objcopy --adjust-vma=0x800000 output_file.hexout -O srec fpga.srec 3. Program the flash memory using grmon: flash erase 0x800000 0xb00000 flash load fpga.srec-This leon3 design is tailored to the Altera NiosII Startix2 Development board, with 16-bit DDR SDRAM and 2 Mbyte of SSRAM. As of this time, the DDR interface only works up to 120 MHz. At 130, DDR data can be read but not written. NOTE: the test bench cannot be simulated with DDR enabled because the Altera pads do not have the correct delay models. * How to program the flash prom with a FPGA programming file 1. Create a hex file of the programming file with Quartus. 2. Convert it to srecord and adjust the load address: objcopy--adjust-vma=0x800000 output_file.hexout-O srec fpga.srec 3. Program the flash memory using grmon: flash erase 0x800000 0xb00000 flash load fpga.srec
Date : 2025-07-09 Size : 112kb User :
[Linux-Unix] srec_cat DL : 0: 工具srec_cat, 可将bin转换为hex, 命令格式如下:srec_cat blob -Binary -Output blob.hex -Motorola 另该工具也支持hex转bin, 如下: srec_cat bootrom_uncmp.hex -Motorola -Output bootrom_uncmp.bin -Binary 适用于某些只支持二进制格式的烧录 -Tools srec_cat, could be bin convert hex, the command format is as follows: srec_cat blob-Binary-Output blob.hex-Motorola The tool also supports another hex to bin, as follows: srec_cat bootrom_uncmp.hex-Motorola-Output bootrom_uncmp.bin-Binary applicable in some binary format only supports the writers
Date : 2025-07-09 Size : 73kb User : 刘俊
[File Format] srec-file-format DL : 0: SREC文件格式详解。SREC文件格式是描述地址与数据的文件格式。该文档讲得很清楚明白。-Detailed SREC file format. SREC file format to describe the address and data file format. The document made clear.
Date : 2025-07-09 Size : 3kb User : 梁明兰
[Embeded Linux] srec_142_win DL : 0: srec文件格式和bin文件格式相互转换工具-convert a Motorola S-Record file into a binary image
Date : 2025-07-09 Size : 15kb User : 王华