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[Otheradder

Description: this code written in systemc language and it is a wewest language that important to simulate the system
Platform: | Size: 1024 | Author: zooz | Hits:

[Other Embeded programfulladder

Description: 一个全加器的systemc代码,包括模块的定义以及测试平台-A source code about full adder using systemc language , including the definition of modules as well as the test platform
Platform: | Size: 2048 | Author: 刘飞阳 | Hits:

[Other Embeded programsystemc

Description: Systemc实现一个加法器,一个乘法器,一个十选一器,并在testbench内检测其正确性。 适用于systemc入门。-Using Systemc for the realization of a adder, a multiplier, a decimator, and within a testbench for their functionalities . Designed for Systemc or C++ beginner .
Platform: | Size: 3072 | Author: 安丽华 | Hits:

[VHDL-FPGA-Verilogexample1

Description: systemc code for adder
Platform: | Size: 194560 | Author: was | Hits:

[CA authADDER_module

Description: 8 bit systemc adder module
Platform: | Size: 1024 | Author: Abidin | Hits:

[VHDL-FPGA-Verilogadder_1bit

Description: adder_1bit using language systemc
Platform: | Size: 17394688 | Author: doanh | Hits:

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