Description: 简化的单时钟循环VHDL处理器.可以运行一些简单的mips指令,例如add, sub, and, or, slt, beq and j. -A simplified single cycle processor in VHDL. This processor can continuously execute some simple MIPS instructions which are lw, sw, add, sub, and, or, slt, beq and j. Platform: |
Size: 191488 |
Author:糖醋鱼 |
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Description: 单周期的mips处理器设计,用vhdl语言实现各个模块的功能-Single-cycle mips processor design, using vhdl language functions of each module Platform: |
Size: 117760 |
Author:王晓强 |
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Description: 本文基于32位 MIPS CPU的体系架构,采用Xilinx ISE 9.1i软件,通过使用Verilog语言编写了32位MIPS单周期和多周期CPU的程序,完成了其逻辑设计并进行了仿真测试。-Based on a 32 MIPS CPU architectures using the Xilinx ISE 9.1i software, write a 32-MIPS, single cycle and multi-cycle CPU program completed its logic design and simulation tests using the Verilog language. Platform: |
Size: 314368 |
Author:朱祖建 |
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Description: 基于MIPS架构实现的单周期处理器,包含多种基本操作,验证方法是把自己的学号写进连续内存。-MIPS-based architecture for single-cycle processor, includes a variety of basic operations, authentication method is to learn their numbers written contiguous memory. Platform: |
Size: 1829888 |
Author:熊京魁 |
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