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[Program doc] spartan3e开发板原理图

Description: spartan3e开发板原理图
Platform: | Size: 1240476 | Author: 2274847490@qq.com | Hits:

[VHDL-FPGA-Verilog] ISE8.1_loopback

Description: 硬件平台为Xilinx Spartan3e，编译软件为ISE8.1，实现了九针com口通信，键盘输入回显，switch控制LED功能。-hardware platform for Xilinx Spartan3e, compile software ISE8.1. achieved nine needles com port communication, a return to the keyboard input, LED control switch function.
Platform: | Size: 23552 | Author: Lincker | Hits:

[Other] lab4ppc

Description: 嵌入式教程：Xilinx Spartan3e 开发环境：EDK 实验教程4：Writing Basic Software Applications -Embedded Tutorial : Xilinx Spartan3e development environment : EDK experimental Guide 4 : Writing Basic Software Applications
Platform: | Size: 1597440 | Author: David | Hits:

[Other] lab5ppc

Description: 嵌入式教程：Xilinx Spartan3e 开发环境：EDK 实验教程4：SDK Lab PowerPC Processor -Embedded Tutorial : Xilinx Spartan3e development environment : EDK experimental Guide 4 : SDK Lab PowerPC Processor
Platform: | Size: 2592768 | Author: David | Hits:

[VHDL-FPGA-Verilog] people4

Description: 这是我自己写的4人表决器源码，在xilinx Spartan3E 上已经调试成功，拿出来与大家分享！-that I wrote four voting machine source code, In xilinx Spartan3E debugging has been successful, with the show to share with you!
Platform: | Size: 270336 | Author: 许的开 | Hits:

[VHDL-FPGA-Verilog] Mult

Description: 这是我自己写的两个8位二进制数的乘法程序，在xilinx Spartan3E 上已经调试成功，拿出来与大家分享！-that I wrote two eight binary number multiplication procedure, In xilinx Spartan3E debugging has been successful, with the show to share with you!
Platform: | Size: 181248 | Author: 许的开 | Hits:

[VHDL-FPGA-Verilog] pa_ser

Description: 这是我自己写的4位并转串ISE代码，在xilinx Spartan3E 上已经调试成功，拿出来与大家分享！-that I wrote four string and turn ISE code In xilinx Spartan3E debugging has been successful, with the show to share with you!
Platform: | Size: 283648 | Author: 许的开 | Hits:

[Other] XC3S500EPQ208

Description: Xilinx SPARTAN3E design guide line
Platform: | Size: 26624 | Author: 凌峰 | Hits:

[VHDL-FPGA-Verilog] spartan3e

Description: 实用的程序代码，希望对大家有用，已经调试通过-Practical program code, in the hope that useful to everybody, has debugging through
Platform: | Size: 189440 | Author: 人杰 | Hits:

[VHDL-FPGA-Verilog] Spartan3E

Description: Spartan3E的LCD字符滚动显示源程序，具体内容见注释-Scroll Spartan3E character LCD display the source code, see the specific contents of the Notes
Platform: | Size: 413696 | Author: xwy | Hits:

[Other] multimode

Description: 这是一个多模式流水灯的工程，并且在Xilinx公司的Spartan3E板上的LCD上能够显示出来。-This is a multi-mode light water project, and Xilinx s Spartan3E the LCD panel can be displayed.
Platform: | Size: 993280 | Author: 于小燕 | Hits:

[VHDL-FPGA-Verilog] microblaze_lab3

Description: spartan3e microblaze软核使用范例教程lab3源代码-the use of soft-core spartan3e microblaze tutorial example source code lab3
Platform: | Size: 5120 | Author: 康丙寅 | Hits:

[VHDL-FPGA-Verilog] microblaze_pwm

Description: spartan3e microblaze 定时器使用的一个源代码-spartan3e microblaze timer using a source code
Platform: | Size: 4096 | Author: 康丙寅 | Hits:

[Other] LCD

Description: Spartan3E的LCD字符滚动显示源程序 VHDL-Scroll Spartan3E character LCD display the VHDL source
Platform: | Size: 411648 | Author: 黄达 | Hits:

[VHDL-FPGA-Verilog] cpld_config

Description: spartan3e starter kit,cpld 的配置文件-spartan3e starter kit,cpld configuration file
Platform: | Size: 1024 | Author: xm | Hits:

[Linux-Unix] Xinlinx_Spartan3E500_RevD_10.1

Description: 这个是我使用xilinx EDK 10.1建立的用语移植petalogic的uclinux发行版本petalinux-v0.4-rc2的Platform工程，开发板使用的是Spartan3E Starter Kit。在这个基础上可以直接裁剪内核后在FPGA中运行uclinux。内核源码可以到developer.petalogix.com下载。-This is a xilinx EDK 10.1, I use the term established by the uclinux transplantation petalogic release petalinux-v0.4-rc2 the Platform project, the development board using Spartan3E Starter Kit. On this basis can be directly cut in the FPGA core to run uclinux. Kernel source code can be downloaded developer.petalogix.com.
Platform: | Size: 13669376 | Author: 古月 | Hits:

[VHDL-FPGA-Verilog] dds_easy

Description: 直接频率合成DDS模块的ise工程，可以直接下载，在Spartan3/Spartan3E上验证通过。该DDS模块可以产生双通道的不同频率的正弦波，也可以产生同频的任意相位差的相移波形。本模块累加器位数为32位，可以产生12位相位精度12位量化精度的正弦波。该设计例化一个Block Ram，为节省储存空间仅需要储存1/4周期的数据。根据需要，可以重新修改数据，改变波形。-DDS direct frequency synthesizer module ，ise project, can be directly downloaded through the Spartan3/Spartan3E and tested successfully. The DDS module can generate two-channel sine wave of different frequency, or produce the same frequency arbitrary waveform phase difference of the phase shift. There is a 32-bit accumulator to generate 12 bit phase-precision 12-bit quantization precision of the sine wave. Cases the design of a Block Ram, in order to save storage space need to store only 1/4 cycle of data. Necessary, can modify data, change the waveform.
Platform: | Size: 471040 | Author: 郭先生 | Hits:

[VHDL-FPGA-Verilog] stopwatch

Description: 基于Xilinx Spartan3E的秒表，能实现计时两次的功能-Based on the Xilinx Spartan3E stopwatch, time to achieve the functions of the two
Platform: | Size: 935936 | Author: darkblue | Hits:

[VHDL-FPGA-Verilog] ps2

Description: 基于Xilinx Spartan3E的ps/2键盘接口，能够把键值传送到FPGA上并在LCD上显示-Xilinx Spartan3E based on the ps/2 keyboard interface, be able to send to the FPGA on the keys and LCD display
Platform: | Size: 506880 | Author: darkblue | Hits:

[source in ebook] spartan3e

Description: key board interface using vhdl in spartan3e
Platform: | Size: 294912 | Author: alhawi | Hits:
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