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[VHDL-FPGA-Veriloglink_port-v1[1].1.0

Description: 用于测试ADI的TS201与FPGA之间通信的LINK程序,压缩文件内包括VHDL和Verlog代码。-ADI is used to test the communication between the TS201 and the FPGA' s LINK program, compressed file to include VHDL and Verlog code.
Platform: | Size: 880640 | Author: 万传 | Hits:

[VHDL-FPGA-VerilogTS201_LINK_TRANSFER

Description: Ts201 link port verilog
Platform: | Size: 3072 | Author: uuii9o | Hits:

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