Description: 在AlTEA的DE2平台上用VerilogHDL实现的VGA控制模块-AlTEA in the DE2 platform with VerilogHDL achieve VGA Control Module Platform: |
Size: 1024 |
Author:luoxi |
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Description: Altera 开发环境下的VGA控制源码,Verilog HDL语言编写,支持sopc环境下操作以及驱动-Altera development environment under the control of VGA source, Verilog HDL language to support the SOPC operating conditions, as well as drive Platform: |
Size: 49152 |
Author: |
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Description: VGA controller源码及显示汉字和ascii字符的c代码实例,已在DE2-70上实现-vga_controller source code and c code which can display chinese charactors and ASCII code on the VGA Platform: |
Size: 304128 |
Author: |
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Description: VGA控制器的Verilog实现代码,对做视频非常实用,有需要的尽管下载-VGA controller to achieve the Verilog code, the video very useful to do, despite the need to download Platform: |
Size: 249856 |
Author:溪溪 |
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Description: This core is a simple and small VGA controller.
* It drives vga monitors with an 800x600 resolution and 72Hz vertical refresh rate (50MHz pixel clock)
* It displays chars on the screen (each char is 8x16 pixels)
* It has a customizable charset (you can use a simple text editor in order to "visually" customize it)
* It can display a color "waveform"
* It can display a color grid and "cross cursor"
-This core is a simple and small VGA controller.
* It drives vga monitors with an 800x600 resolution and 72Hz vertical refresh rate (50MHz pixel clock)
* It displays chars on the screen (each char is 8x16 pixels)
* It has a customizable charset (you can use a simple text editor in order to "visually" customize it)
* It can display a color "waveform"
* It can display a color grid and "cross cursor"
Platform: |
Size: 44032 |
Author:sdroamt |
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Description: presentation a low cost video tracking algorithm implemented on an Altera DE2 board with Cyclone II processor. System uses a VGA controller and several SG-DMA s-presentation on a low cost video tracking algorithm implemented on an Altera DE2 board with Cyclone II processor. System uses a VGA controller and several SG-DMA s Platform: |
Size: 1514496 |
Author:stjohn |
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Description: 分析了各种视频采集方案的研究现状。对如何采用CCD 摄像头采集高分辨率、高质量的图像以及基于FPGA 的嵌
入式视频图像采集系统的实现方法进行了研究。采用了以摄像头+ 解码芯片模式为采集方案, 针对视频解码芯片
ADV7181B,实现了I2C 总线配置、ITU656 解码、VGA 显示模块的设计。设计的视频采集控制器已经在Altera 公司的CycloneII
系列FPGA(EP2C35)上实现。结果显示本设计具有速度高、成本低、易于集成等优点-Analysis of a variety of video capture programs reviewed. On how to use CCD camera capture high-resolution, high-quality images, as well as FPGA-based embedded video image acquisition system realization method was studied. Used to camera mode+ decoder chip collection program for video decoder chip ADV7181B, realized the I2C bus configuration, ITU656 decoder, VGA display module design. The video capture controller has been designed in the Altera' s CycloneII series FPGA (EP2C35) to achieve. The results showed that this design has a high speed, low cost, easy to integrate the advantages of Platform: |
Size: 179200 |
Author:李明 |
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Description: freeDev数字应用开发板中的VGA控制器的IP核的verilog实现-freeDev digital application development board of the VGA controller IP core implementation of the verilog Platform: |
Size: 70656 |
Author:武忡波 |
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Description: 老外写的基于wishbone总线协议的VGA核控制器,Verilog版本适合于初学者学习VGA核控制器的原理以及总线协议的把握-Written by foreigners wishbone bus protocol based on the nuclear VGA controller, Verilog version is suitable for beginners to learn the principles of the controller and the VGA core grasp of bus protocol Platform: |
Size: 2145280 |
Author:张昕 |
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