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Description: UCLINUX2.6核下的vga驱动。基于framebuffer机理。硬件设计采用基于FPGA的软核NIOSII设计。-UCLINUX2.6 the upper vga driver. Based on the mechanism of the framebuffer. Hardware design using FPGA-based soft-core NIOSII design.
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Size: 4715 |
Author: Ray ZH |
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Description: 用VHDL语言写的VGA核心,是个很好很齐全的核心,有很多功能.-write VHDL VGA core, is a very good subset of the core, has a lot of functions.
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Size: 359568 |
Author: 朱思华 |
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Description: USB 1.1 IP-CORE和设计范例 VHDL源代码-Sample program for USB1.1 IP core design, VHDL source code
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Size: 425984 |
Author: ken |
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Description: 用VHDL语言写的VGA核心,是个很好很齐全的核心,有很多功能.-write VHDL VGA core, is a very good subset of the core, has a lot of functions.
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Size: 359424 |
Author: 朱思华 |
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Description: user_logic_VGA_Controller,适合于DE2开发板,把这个文件夹放在工程目录之中,就可以在SOPC里直接添加VGA_Controller IP核了,很方便使用。-user_logic_VGA_Controller. suitable for Dictyophora development board, this folder on the project directory, it can be added directly SOPC Lane VGA_Controller IP core, very convenient to use.
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Size: 70656 |
Author: 曾 |
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Description: 基于FPGA的VGA控制器设计。对外支持普通VGA接口,以600×480的分辨率和60Hz扫描率为例。对内支持NIOSII软核接口。-FPGA-based VGA controller design. External support ordinary VGA interface, to 600 × 480 resolution and scan rate of 60Hz as an example. Internal support NIOSII soft-core interface.
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Size: 288768 |
Author: Ray ZH |
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Description: UCLINUX2.6核下的vga驱动。基于framebuffer机理。硬件设计采用基于FPGA的软核NIOSII设计。-UCLINUX2.6 the upper vga driver. Based on the mechanism of the framebuffer. Hardware design using FPGA-based soft-core NIOSII design.
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Size: 4096 |
Author: Ray ZH |
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Description: VHDL-vga_core(vhdl).rar
FPGA上实现 VGA的IP(VHDL)-VHDL-vga_core (vhdl). RarFPGA realize VGA on the IP (VHDL)
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Size: 458752 |
Author: nanotalk |
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Description: vga ipcore的verilog代码
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Size: 495616 |
Author: |
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Description: DE2板子附带的VGA IPCORE 有兴趣的朋友可以下载-DE2 board VGA IPCORE accompanying friends who are interested can download
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Size: 79872 |
Author: huang |
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Description: VGA的IP核,可直接用于nios II的应用里,在DE2板子直接使用-VGA s IP core, can be used directly in nios II applications, the direct use in the DE2 board
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Size: 79872 |
Author: 沈克镇 |
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Description: VGA控制器源码,代码已经过验证,可以立即使用。-VGA controller source code, the code has already been verified, you can immediately use.
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Size: 16384 |
Author: wangjianguang |
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Description: VGA核的verilog实现,能用于NIOS2的avalon总线-VGA core Verilog realize, can be used to NIOS2 the avalon bus
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Size: 617472 |
Author: 李永杰 |
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Description: vga ip core nios sopc
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Size: 76800 |
Author: yec |
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Description: 这个试验要配合EDA4.0底板一起使用.先将核心板插在EDA4.0底板上面,然后接上VGA显示器.
1。源文件保存在src目录,QII的工程文件保存在Proj目录;
2。程序实现的功能是在VGA显示器上显示彩色条纹,共8种颜色;
3。具体设计参考代码。
-The pilot should be used in conjunction with the backplane EDA4.0. First core plate inserted EDA4.0 floor above, and then connect to VGA monitors .1. Source file stored in the src directory, QII the project file stored in the directory Proj 2. Realize the function of the procedure is displayed on the monitor in the VGA color stripes, a total of eight kinds of color 3. Specific reference code.
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Size: 58368 |
Author: Jak |
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Description: CPLD/FPGA 入门文档。国内某知名fpga开发商编写的基础教程,共18篇。从使用fpga如何点亮led灯到VGA到8051内核使用方法。如果您是打算学习cpld/fpga,建议先阅读这些文章再选择采购开发板。-CPLD/FPGA entry documents. FPGA developers a well-known domestic basis for the preparation of curricula, a total of 18. From how to use the FPGA to the VGA lit lamp led to the 8051 core to use. If you intend to study cpld/fpga, we suggest that you first read the article and then select the procurement development board.
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Size: 5509120 |
Author: gao |
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Description: 基于sopc的vga ip核设计参考文档-Based on SOPC vga ip-core design of the reference documentation
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Size: 1293312 |
Author: mxl |
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Description: 基于单片机51核的FPGA VGA显示实例,肯定有现象哈-51 single-chip core-based FPGA VGA display examples of the phenomenon certainly Kazakhstan
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Size: 177152 |
Author: zuoshu |
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Description: FPGA do vga display controller. achieve include: fifo mem, vga core, rgb controller,
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Size: 7168 |
Author: Aleks |
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Description: controladpr vga core con test bench
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Size: 3036160 |
Author: el_guel
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