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Description: vhdl程序源代码,包括Combinational Logic
Counters
Shift Registers
Memory
State Machines
Registers
Systems
ADC and DAC
Arithmetic等-VHDL source code, including Combinational Logic Counters Shift Registers State Machines Registers Memory Systems ADC and DAC Arithmetic etc.
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Size: 168960 |
Author: 王力 |
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Description: 驱动模数转换器ADC0809转换的VHDL代码-Driver Analog to Digital Conversion Connection between ADC 0809 VHDL code
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Size: 108544 |
Author: YI |
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Description: Analog-to-Digital Converter,VHDL code-Analog-to-Digital Converter, VHDL code
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Size: 14336 |
Author: leigh lee |
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Description: Serial ADC Interface write in VHDL based on xilinx cpld
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Size: 33792 |
Author: jiang |
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Description: 用FPGA实现的ADC采样器,用VHDL编写,8个模拟信号通道地址,8位数据输出-Using FPGA to achieve the ADC sampler, using VHDL prepared 8-channel analog signal address, 8-bit data output
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Size: 124928 |
Author: 叶开 |
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Description: VHDL控制ADC0809芯片,实现AD转化及采集后数据的读写。-VHDL control ADC0809 chip realize after AD conversion and acquisition of reading and writing data.
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Size: 4096 |
Author: zhou129 |
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Description: 一个8位AD转换程序,希望对初学者有些帮助。-An 8-bit AD conversion process, I hope some help for beginners.
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Size: 1024 |
Author: tian |
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Description: 用verilog编程实现的基于FPGA的AD数据采集程序-Verilog Programming with FPGA-based data collection procedures AD
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Size: 499712 |
Author: 张西贝 |
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Description: 一个关于adc的vhdl源码
一个关于adc的vhdl源码-Adc on the VHDL source code on the VHDL source adc
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Size: 3072 |
Author: rui |
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Description: 利用Verilog HDL对AD7705进行控制ADC采样,实验室师兄的-Using Verilog HDL to the AD7705 control ADC sampling, laboratory师兄the
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Size: 589824 |
Author: ticklay |
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Description: Xilinx FPGA 开发板的ADC采样源程序 内有PDF文档详细说明 VHDL代码-Xilinx FPGA development board with the ADC sampling source has a detailed description PDF document VHDL code
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Size: 951296 |
Author: visual |
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Description: 关于ADC的硬体描述语言,
已经验证过了-On the ADC hardware description language, has already been verified
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Size: 10240 |
Author: |
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Description: vhdl实现对模数转换芯片adc0832的控制,程序采用的是状态编码输出.-VHDL realization of analog-digital conversion chip adc0832 control, procedures using state of the output encoding.
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Size: 24576 |
Author: liaocongliang |
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Description: it is a verilog code written for MAX1886 ADC interin modelsim simulator and it will synthesize in xinlix ise 8.2i.i have tested it om my kit. -it is a verilog code written for MAX1886 ADC interin modelsim simulator and it will synthesize in xinlix ise 8.2i.i have tested it om my kit.
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Size: 6144 |
Author: yasir ateeq |
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Description: DEMO2 数码管扫描显示电路/DEMO4 计数时钟
DEMO5 键盘扫描设计/DEMO6 波形发生器/DEMO7 用DAC实现电压信号检测/DEMO8 ADC电压测量/DEMO9 液晶驱动电路设计-DEMO2 digital tube display circuit scan/DEMO4 count clock scan design DEMO5 keyboard/DEMO6 Waveform Generator/DEMO7 implementation by DAC voltage signal detection/DEMO8 ADC voltage measurement/DEMO9 LCD driver circuit design
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Size: 736256 |
Author: wang |
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Description: 实现MAX187单通道12位串行输出AD器件采样时序的生成。-use MAX187 to sample
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Size: 890880 |
Author: 潘旺 |
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Description: ADC,DAC转换接口~耐心讲述可以学会使用原理-ADC, DAC converter interface ~ patience can be learned about the use of the principle of
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Size: 171008 |
Author: dengaoni |
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Description: communication spi adc for spartan 3e
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Size: 4096 |
Author: hung |
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Description: adc转换功能的vhdl源码,其中包含adc_interface 和转换还包含串口输出-adc tranfer
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Size: 35840 |
Author: jiangpeng |
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Description: This file is used in ADC 7656 interface.
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Size: 1024 |
Author: Gamaliel Moses |
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