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Description: 一个16位cpu的vhdl代码。具体内容我也不清楚,自己慢慢研究吧-a 16 cpu of VHDL code. Specific content is not clear to me that their study it slowly
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Size: 3121 |
Author: 王林 |
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Description: 用VHDL语言开发的一个16位的具有5级流水线的CPU设计
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Size: 417912 |
Author: luanjinlong |
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Description: 一个16位cpu的vhdl代码。具体内容我也不清楚,自己慢慢研究吧-a 16 cpu of VHDL code. Specific content is not clear to me that their study it slowly
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Size: 3072 |
Author: 王林 |
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Description: 用VHDL语言开发的一个16位的具有5级流水线的CPU设计-VHDL language used to develop a 16 with five lines of the CPU design
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Size: 417792 |
Author: luanjinlong |
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Description: 实现一个16位CPU。该CPU使用精减指令集,是一个五段流水线的结构。包括取指令(IF)、读寄存器(RD)、运算器(ALU)、内存读写(MEM)和写回(WB)。-The realization of a 16-bit CPU. Streamline the use of the CPU instruction set is a structure of five lines. Including fetch (IF), register read (RD), arithmetic logic unit (ALU), memory read and write (MEM) and Write Back (WB).
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Size: 6144 |
Author: 周健 |
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Description: Verilog下描述16位CPU,虽然有点简单,但具有一定的可读性,内附夏宇闻老师的8位CPU文档-Verilog description of 16-bit CPU, though a bit simple, but with a certain degree of readability, XIA Yu-Wen teachers containing 8-bit CPU Documentation
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Size: 231424 |
Author: 张文龙 |
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Description: 自己用VHDL写的16位的CPU,在学校的课程上通过了测试。-Own use VHDL to write a 16-bit CPU, in school curriculum passed the test.
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Size: 1183744 |
Author: Hui |
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Description: 16位cpu设计vhdl源码。主要实现risc机器模型-16-bit cpu design code
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Size: 182272 |
Author: peterloo |
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